diff options
| author | Stefano Babic <sbabic@denx.de> | 2010-03-05 17:54:37 +0100 |
|---|---|---|
| committer | Tom Rix <Tom.Rix@windriver.com> | 2010-03-07 12:36:36 -0600 |
| commit | e4d34492017c95e4041ea0c581e1ab8d1d49381b (patch) | |
| tree | 3badc8c1ab6433507c7c9d6993ad7aaacb47bf4f /cpu/arm_cortexa8/mx51/clock.c | |
| parent | 9d69e33d8d0f112fe3a089101d023e87431684d1 (diff) | |
MX51: removed warnings for the mx51evk
The patch removes warnings at compile time and provides
some cleanup code:
- Removed comment on NAND (not yet supported) from lowlevel_init.S
- Removed NFMS bit definition from imx-regs.h
The bit is only related to MX.25/35 and can lead to confusion
- Moved is_soc_rev() to soc specific code (removed from mx51evk.c)
Signed-off-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'cpu/arm_cortexa8/mx51/clock.c')
| -rw-r--r-- | cpu/arm_cortexa8/mx51/clock.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/cpu/arm_cortexa8/mx51/clock.c b/cpu/arm_cortexa8/mx51/clock.c index 3c6f0c08ad..38480ac5a1 100644 --- a/cpu/arm_cortexa8/mx51/clock.c +++ b/cpu/arm_cortexa8/mx51/clock.c @@ -28,6 +28,7 @@ #include <asm/errno.h> #include <asm/arch/imx-regs.h> #include <asm/arch/crm_regs.h> +#include <asm/arch/clock.h> enum pll_clocks { PLL1_CLOCK = 0, @@ -42,7 +43,7 @@ struct mxc_pll_reg *mxc_plls[PLL_CLOCKS] = { [PLL3_CLOCK] = (struct mxc_pll_reg *)PLL3_BASE_ADDR, }; -struct mxc_ccm_reg *mxc_ccm = MXC_CCM_BASE; +struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)MXC_CCM_BASE; /* * Calculate the frequency of this pll. |