diff options
| author | Reid Tonking <reidt@ti.com> | 2023-12-07 10:52:11 -0600 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2023-12-19 10:15:54 -0500 |
| commit | 3d6cb0390557b7cbc90c5e548072f3c3497f3873 (patch) | |
| tree | 6f5523f4f65adeaffc2fcfdc8ff0cd797e7032e6 /common/cli_readline.c | |
| parent | 9fc5e19c2e6f9cc71c66faea67accaf77f0c13e8 (diff) | |
arm: dts: k3-j7200-r5-common-proc-board: Set parent clock for clock ID 323
Previously, dynamic frequency scaling supported rates only through fixed
divison.
This virtual clock mux configuration enables more varied rates on A72
clock ID 202 by setting up the required register.
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Signed-off-by: Reid Tonking <reidt@ti.com>
Diffstat (limited to 'common/cli_readline.c')
0 files changed, 0 insertions, 0 deletions