diff options
author | Tom Rini <trini@konsulko.com> | 2021-10-25 09:54:36 -0400 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2021-10-25 09:54:36 -0400 |
commit | 35a7677e382172e5024b38ff997944ca83909384 (patch) | |
tree | c24f1e6a68a07f26e6fcfbeb0cac04cd755fcf43 /board/phytec/phycore_imx8mm/spl.c | |
parent | 355d1e24f6143c4839be3c015c191421c4e9449c (diff) | |
parent | 56ced770999bd14cd940e07239f4197852460142 (diff) |
Merge tag 'u-boot-imx-20211022' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
u-boot-imx-20211022
-------------------
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/9561
- i.MX8:
- Toradex Verdin (switch to binman, cleanup, etc.)
- Phytec phycore_imx8mm (fixes, boot from SPI-NOR)
- fixes for imx8mp_evk
- doc (i.MX): MX8MM with Fast boot
- i.MX6:
- Toradex : colibri-imx6ull with eMMC, fixes
- i.MX7ULP :
- preparation for OPTEE + Serial Number
- generic:
- imx8m_image: Support ddr3 firmware
Diffstat (limited to 'board/phytec/phycore_imx8mm/spl.c')
-rw-r--r-- | board/phytec/phycore_imx8mm/spl.c | 19 |
1 files changed, 1 insertions, 18 deletions
diff --git a/board/phytec/phycore_imx8mm/spl.c b/board/phytec/phycore_imx8mm/spl.c index 64f0780f6e..d54145ef99 100644 --- a/board/phytec/phycore_imx8mm/spl.c +++ b/board/phytec/phycore_imx8mm/spl.c @@ -12,8 +12,6 @@ #include <asm/global_data.h> #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/iomux-v3.h> -#include <dm/device.h> -#include <dm/uclass.h> #include <hang.h> #include <init.h> #include <log.h> @@ -39,7 +37,7 @@ int spl_board_boot_device(enum boot_device boot_dev_spl) } } -void spl_dram_init(void) +static void spl_dram_init(void) { ddr_init(&dram_timing); } @@ -54,15 +52,10 @@ void spl_board_init(void) puts("Normal Boot\n"); } -#ifdef CONFIG_SPL_LOAD_FIT int board_fit_config_name_match(const char *name) { - /* Just empty function now - can't decide what to choose */ - debug("%s: %s\n", __func__, name); - return 0; } -#endif #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1) #define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE) @@ -91,7 +84,6 @@ int board_early_init_f(void) void board_init_f(ulong dummy) { - struct udevice *dev; int ret; arch_cpu_init(); @@ -100,8 +92,6 @@ void board_init_f(ulong dummy) board_early_init_f(); - timer_init(); - preloader_console_init(); /* Clear the BSS. */ @@ -113,13 +103,6 @@ void board_init_f(ulong dummy) hang(); } - ret = uclass_get_device_by_name(UCLASS_CLK, - "clock-controller@30380000", &dev); - if (ret < 0) { - printf("Failed to find clock node. Check device tree\n"); - hang(); - } - enable_tzc380(); /* DDR initialization */ |