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| author | Wolfgang Denk <wd@denx.de> | 2012-04-30 16:45:56 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2012-04-30 16:45:56 +0200 |
| commit | 5f6db68b42024b51a9a1fddd7d4371d2af82c090 (patch) | |
| tree | 03c2bf7a546dddbac2cb9ab1c71bed56adfbf988 /board/freescale/common/p_corenet/law.c | |
| parent | 04a9cb8c5947cec4356cf3b95a8ea3cc839dc540 (diff) | |
| parent | 822ad60f1c37a79659dc5889eb2993a462c9a95f (diff) | |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
* 'master' of git://git.denx.de/u-boot-mpc85xx:
powerpc/85xx: don't touch MAS7 on e500v1 when relocating CCSR
powerpc/85xx: don't display address map size (32-bit vs. 36-bit) during boot
cmd_bdinfo: display the address map size (32-bit vs. 36-bit)
PowerPC: correct the SATA for p1/p2 rdb-pc platform
powerpc/corenet_ds: Slave core in holdoff when boot from SRIO
powerpc/corenet_ds: Slave reads ENV from master when boot from SRIO
powerpc/corenet_ds: Slave uploads ucode when boot from SRIO
powerpc/corenet_ds: Slave module for boot from SRIO
powerpc/corenet_ds: Master module for boot from SRIO
powerpc/corenet_ds: Document for the boot from SRIO
powerpc/corenet_ds: Correct the compilation errors about ENV
powerpc/srio: Rewrite the struct ccsr_rio
powerpc/85xx:Fix lds for nand boot debug info
powerpc/p2041rdb: add env in NAND support
powerpc/p2041rdb: add NAND and NAND boot support
powerpc/mpc8xxx: Fix CONFIG_DDR_RAW_TIMING for two boards
powerpc/85xx:Avoid vector table compilation for nand_spl
powerpc/85xx:Fix IVORs addr after vector table relocation
powerpc/85xx:Avoid hardcoded vector address for IVORs
powerpc/p1023rds: Disable nor flash node and enable nand flash node
Diffstat (limited to 'board/freescale/common/p_corenet/law.c')
| -rw-r--r-- | board/freescale/common/p_corenet/law.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/board/freescale/common/p_corenet/law.c b/board/freescale/common/p_corenet/law.c index 09ef5615d2..c4566ddd4f 100644 --- a/board/freescale/common/p_corenet/law.c +++ b/board/freescale/common/p_corenet/law.c @@ -48,6 +48,19 @@ struct law_entry law_table[] = { #ifdef CONFIG_SYS_NAND_BASE_PHYS SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC), #endif +#ifdef CONFIG_SRIOBOOT_SLAVE +#if defined(CONFIG_SRIOBOOT_SLAVE_PORT0) + SET_LAW(CONFIG_SYS_SRIOBOOT_SLAVE_ADDR_PHYS, + LAW_SIZE_1M, LAW_TRGT_IF_RIO_1), + SET_LAW(CONFIG_SYS_SRIOBOOT_UCODE_ENV_ADDR_PHYS, + LAW_SIZE_1M, LAW_TRGT_IF_RIO_1), +#elif defined(CONFIG_SRIOBOOT_SLAVE_PORT1) + SET_LAW(CONFIG_SYS_SRIOBOOT_SLAVE_ADDR_PHYS, + LAW_SIZE_1M, LAW_TRGT_IF_RIO_2), + SET_LAW(CONFIG_SYS_SRIOBOOT_UCODE_ENV_ADDR_PHYS, + LAW_SIZE_1M, LAW_TRGT_IF_RIO_2), +#endif +#endif }; int num_law_entries = ARRAY_SIZE(law_table); |