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authorMarek Vasut <marex@denx.de>2022-09-19 21:37:07 +0200
committerStefano Babic <sbabic@denx.de>2022-09-20 18:30:02 +0200
commitfdf6bbb260c36bb54826bffb4dd4d62b90c3cede (patch)
treecca0acaf01010a37908c5fed7ee34aaad6a9a697 /board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c
parent9bf0cbf396beaf3257698f672207ab7849134618 (diff)
ARM: imx: Deduplicate i.MX8M SNVS LPGPR unlock
Pull this LPGPR unlock into common code, since it is used in multiple systems already. Signed-off-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c')
-rw-r--r--board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c17
1 files changed, 0 insertions, 17 deletions
diff --git a/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c b/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c
index 6f06daf86f..9d8e19d994 100644
--- a/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c
+++ b/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c
@@ -37,22 +37,6 @@ int board_phys_sdram_size(phys_size_t *size)
return 0;
}
-/* IMX8M SNVS registers needed for the bootcount functionality */
-#define SNVS_BASE_ADDR 0x30370000
-#define SNVS_LPSR 0x4c
-#define SNVS_LPLVDR 0x64
-#define SNVS_LPPGDR_INIT 0x41736166
-
-static void setup_snvs(void)
-{
- /* Enable SNVS clock */
- clock_enable(CCGR_SNVS, 1);
- /* Initialize glitch detect */
- writel(SNVS_LPPGDR_INIT, SNVS_BASE_ADDR + SNVS_LPLVDR);
- /* Clear interrupt status */
- writel(0xffffffff, SNVS_BASE_ADDR + SNVS_LPSR);
-}
-
static void setup_eqos(void)
{
struct iomuxc_gpr_base_regs *gpr =
@@ -145,7 +129,6 @@ int board_init(void)
{
setup_eqos();
setup_fec();
- setup_snvs();
return 0;
}