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| author | Tom Rini <trini@konsulko.com> | 2023-12-18 08:31:50 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2023-12-18 09:55:32 -0500 |
| commit | 1373ffde52e16af83fb14a1d228508a8caaa9996 (patch) | |
| tree | 03bb09d38a260233e3f5b9493d14c82dbd267299 /board/data_modul/imx8mp_edm_sbc/spl.c | |
| parent | fdefb4e194c65777fa11479119adaa71651f41d4 (diff) | |
| parent | 97a897444235921ce19b4f8a3b27de6f5a9ab367 (diff) | |
Merge tag 'v2024.01-rc5' into next
Prepare v2024.01-rc5
Diffstat (limited to 'board/data_modul/imx8mp_edm_sbc/spl.c')
| -rw-r--r-- | board/data_modul/imx8mp_edm_sbc/spl.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/board/data_modul/imx8mp_edm_sbc/spl.c b/board/data_modul/imx8mp_edm_sbc/spl.c index cfc4b65e0f..a3600c8568 100644 --- a/board/data_modul/imx8mp_edm_sbc/spl.c +++ b/board/data_modul/imx8mp_edm_sbc/spl.c @@ -68,6 +68,11 @@ int data_modul_imx_edm_sbc_board_power_init(void) /* To avoid timing risk from SoC to ARM, increase VDD_ARM to OD voltage 0.95V */ pmic_reg_write(dev, PCA9450_BUCK2OUT_DVS0, 0x1c); + /* DRAM Vdd1 always FPWM */ + pmic_reg_write(dev, PCA9450_BUCK5CTRL, 0x0d); + /* DRAM Vdd2/Vddq always FPWM */ + pmic_reg_write(dev, PCA9450_BUCK6CTRL, 0x0d); + /* Set LDO4 and CONFIG2 to enable the I2C level translator. */ pmic_reg_write(dev, PCA9450_LDO4CTRL, 0x59); pmic_reg_write(dev, PCA9450_CONFIG2, 0x1); |