board: cssi: Move all mother board code into common.c

All the code used to manage the mother boards will be
common to soon to come CPU board.

Move all that code into common.c

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>

1 files changed, 123 insertions, 1 deletions

diff --git a/board/cssi/common/common.c b/board/cssi/common/common.c
index de68e23fcd..7ecf772620 100644
--- a/board/cssi/common/common.c
+++ b/board/cssi/common/common.c
@@ -9,8 +9,26 @@
  */
 
 #include <dm.h>
+#include <env.h>
 #include <fdt_support.h>
+#include <hang.h>
 #include <spi.h>
+#include <linux/delay.h>
+#include <asm/io.h>
+
+#include "common.h"
+
+#define ADDR_FPGA_R_BASE		((unsigned char  __iomem *)CONFIG_FPGA_BASE)
+
+#define FPGA_R_ACQ_AL_FAV	0x04
+
+#define TYPE_MCR			0x22
+#define TYPE_MIAE			0x23
+
+#define FAR_CASRSA     2
+#define FAR_VGOIP      4
+#define FAV_CLA        7
+#define FAV_SRSA       8
 
 #define SPI_EEPROM_READ	0x03
 
@@ -36,7 +54,7 @@ static int fdt_set_node_and_value(void *blob, char *node, const char *prop,
 }
 
 /* Checks front/rear id and remove unneeded nodes from the blob */
-void ft_cleanup(void *blob, unsigned long id, const char *prop, const char *compatible)
+static void ft_cleanup(void *blob, unsigned long id, const char *prop, const char *compatible)
 {
 	int off;
 
@@ -95,3 +113,107 @@ int read_eeprom(u8 *din, int len)
 
 	return 0;
 }
+
+int ft_board_setup_common(void *blob)
+{
+	u8 far_id, fav_id;
+
+	if (in_8(ADDR_FPGA_R_BASE) != TYPE_MIAE)
+		return 0;
+
+	far_id = in_8(ADDR_FPGA_R_BASE + 0x43) >> 5;
+	ft_cleanup(blob, far_id, "far-id", "cs,mia-far");
+
+	fav_id = in_8(ADDR_FPGA_R_BASE + 0x44) >> 5;
+
+	if (far_id == FAR_CASRSA && fav_id == FAV_CLA)
+		fav_id = FAV_SRSA;
+
+	ft_cleanup(blob, fav_id, "fav-id", "cs,mia-fav");
+
+	if (far_id == FAR_CASRSA)
+		ft_board_setup_phy3();
+
+	return 0;
+}
+
+int checkboard_common(void)
+{
+	switch (in_8(ADDR_FPGA_R_BASE)) {
+		int far_id;
+	case TYPE_MCR:
+		printf("MCR3000_2G (CS GROUP)\n");
+		break;
+	case TYPE_MIAE:
+		far_id = in_8(ADDR_FPGA_R_BASE + 0x43) >> 5;
+
+		if (far_id == FAR_VGOIP)
+			printf("VGoIP (CS GROUP)\n");
+		else
+			printf("MIAE (CS GROUP)\n");
+
+		break;
+	default:
+		printf("Unknown\n");
+		for (;;)
+			;
+		break;
+	}
+	return 0;
+}
+
+void misc_init_r_common(void)
+{
+	u8 tmp, far_id;
+	int count = 3;
+
+	switch (in_8(ADDR_FPGA_R_BASE)) {
+	case TYPE_MCR:
+		/* if at boot alarm button is pressed, delay boot */
+		if ((in_8(ADDR_FPGA_R_BASE + 0x31) & FPGA_R_ACQ_AL_FAV) == 0)
+			env_set("bootdelay", "60");
+
+		env_set("config", CFG_BOARD_MCR3000_2G);
+		env_set("hostname", CFG_BOARD_MCR3000_2G);
+		break;
+
+	case TYPE_MIAE:
+		do {
+			tmp = in_8(ADDR_FPGA_R_BASE + 0x41);
+			count--;
+			mdelay(10); /* 10msec wait */
+		} while (count && tmp != in_8(ADDR_FPGA_R_BASE + 0x41));
+
+		if (!count) {
+			printf("Cannot read the reset factory switch position\n");
+			hang();
+		}
+
+		if (tmp & 0x1)
+			env_set_default("Factory settings switch ON", 0);
+
+		env_set("config", CFG_BOARD_MIAE);
+		far_id = in_8(ADDR_FPGA_R_BASE + 0x43) >> 5;
+
+		if (far_id == FAR_VGOIP)
+			env_set("hostname", CFG_BOARD_VGOIP);
+		else
+			env_set("hostname", CFG_BOARD_MIAE);
+		break;
+
+	default:
+		env_set("config", CFG_BOARD_CMPCXXX);
+		env_set("hostname", CFG_BOARD_CMPCXXX);
+		break;
+	}
+}
+
+void iop_setup_common(void)
+{
+	u8 type = in_8(ADDR_FPGA_R_BASE);
+
+	if (type == TYPE_MCR)
+		iop_setup_mcr();
+	else if (type == TYPE_MIAE)
+		iop_setup_miae();
+}