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authorChristophe Leroy <christophe.leroy@csgroup.eu>2023-04-04 13:09:36 +0200
committerChristophe Leroy <christophe.leroy@csgroup.eu>2023-04-28 17:52:23 +0200
commit4d0c8db74d83e43dec4e7481b2d1e194f51d907b (patch)
tree0d629f90439e93a7ff04911557e9c9259671d8b4 /board/cssi/cmpcpro/nand.c
parent78ba7b61da1271d982ff9c87b879d197ef911776 (diff)
board: cssi: Add CPU board CMPCPRO
CSSI has another CPU board, similar to the CMPC885 board that get plugged on the two base boards MCR3000_2G and MIAE. That CPU board is called CMPCPRO because it has a MPC8321E CPU, also known as Power QUICC II PRO. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Diffstat (limited to 'board/cssi/cmpcpro/nand.c')
-rw-r--r--board/cssi/cmpcpro/nand.c43
1 files changed, 43 insertions, 0 deletions
diff --git a/board/cssi/cmpcpro/nand.c b/board/cssi/cmpcpro/nand.c
new file mode 100644
index 0000000000..d8b4197314
--- /dev/null
+++ b/board/cssi/cmpcpro/nand.c
@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2010-2023 CS GROUP France
+ * Florent TRINH THAI (florent.trinh-thai@csgroup.eu)
+ * Stephane FRANJOU (stephane.franjou@csgroup.eu)
+ */
+
+#include <config.h>
+#include <nand.h>
+#include <linux/bitops.h>
+#include <linux/mtd/rawnand.h>
+#include <asm/io.h>
+
+#define BIT_CLE BIT(6)
+#define BIT_ALE BIT(5)
+
+static u32 nand_mask(unsigned int ctrl)
+{
+ return ((ctrl & NAND_CLE) ? BIT_CLE : 0) |
+ ((ctrl & NAND_ALE) ? BIT_ALE : 0);
+}
+
+static void nand_hwcontrol(struct mtd_info *mtdinfo, int cmd, unsigned int ctrl)
+{
+ immap_t __iomem *immr = (immap_t *)CONFIG_SYS_IMMR;
+ struct nand_chip *chip = mtd_to_nand(mtdinfo);
+
+ if (ctrl & NAND_CTRL_CHANGE)
+ clrsetbits_be32(&immr->qepio.ioport[2].pdat,
+ BIT_CLE | BIT_ALE, nand_mask(ctrl));
+
+ if (cmd != NAND_CMD_NONE)
+ out_8(chip->IO_ADDR_W, cmd);
+}
+
+int board_nand_init(struct nand_chip *nand)
+{
+ nand->chip_delay = 60;
+ nand->ecc.mode = NAND_ECC_SOFT;
+ nand->cmd_ctrl = nand_hwcontrol;
+
+ return 0;
+}