diff options
| author | Svyatoslav Ryhel <clamor95@gmail.com> | 2023-06-30 10:29:04 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2023-06-30 15:20:37 +0200 |
| commit | 855ffdfa650aa54edf2bfdd99da50cd6255453b8 (patch) | |
| tree | da2fc54fa644f436706996c489de0d1095d43673 /board/asus/grouper/grouper-spl-max.c | |
| parent | 15be9a7b3b08fa11d046162aaeb899e5d726cb90 (diff) | |
board: asus: grouper: add Google Nexus 7 (2012) support
Nexus 7 is a mini tablet computer co-developed by Google and Asus
that runs the Android operating system. The Nexus 7 features a 7"
display, an Nvidia Tegra 3 quad-core chip, 1 GB of RAM and 8/16 GB
of internal storage.
This patch brings support for all 3 known ASUS/Google devices:
- Nexus 7 (2012) E1565
- Nexus 7 (2012) PM269
- Nexus 7 (2012) 3G - tilapia
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS Grouper E1565
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # ASUS Grouper E1565
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'board/asus/grouper/grouper-spl-max.c')
| -rw-r--r-- | board/asus/grouper/grouper-spl-max.c | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/board/asus/grouper/grouper-spl-max.c b/board/asus/grouper/grouper-spl-max.c new file mode 100644 index 0000000000..844383766a --- /dev/null +++ b/board/asus/grouper/grouper-spl-max.c @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * T30 Grouper MAX SPL stage configuration + * + * (C) Copyright 2010-2013 + * NVIDIA Corporation <www.nvidia.com> + * + * (C) Copyright 2022 + * Svyatoslav Ryhel <clamor95@gmail.com> + */ + +#include <common.h> +#include <asm/arch-tegra/tegra_i2c.h> +#include <linux/delay.h> + +#define MAX77663_I2C_ADDR (0x3C << 1) + +#define MAX77663_REG_SD0 0x16 +#define MAX77663_REG_SD0_DATA (0x2100 | MAX77663_REG_SD0) +#define MAX77663_REG_SD1 0x17 +#define MAX77663_REG_SD1_DATA (0x3000 | MAX77663_REG_SD1) +#define MAX77663_REG_LDO4 0x2B +#define MAX77663_REG_LDO4_DATA (0xE000 | MAX77663_REG_LDO4) + +#define MAX77663_REG_GPIO4 0x3A +#define MAX77663_REG_GPIO4_DATA (0x0100 | MAX77663_REG_GPIO4) + +void pmic_enable_cpu_vdd(void) +{ + /* Set VDD_CORE to 1.200V. */ + tegra_i2c_ll_write(MAX77663_I2C_ADDR, MAX77663_REG_SD1_DATA); + + udelay(1000); + + /* Bring up VDD_CPU to 1.0125V. */ + tegra_i2c_ll_write(MAX77663_I2C_ADDR, MAX77663_REG_SD0_DATA); + udelay(1000); + + /* Bring up VDD_RTC to 1.200V. */ + tegra_i2c_ll_write(MAX77663_I2C_ADDR, MAX77663_REG_LDO4_DATA); + udelay(10 * 1000); + + /* Set 32k-out gpio state */ + tegra_i2c_ll_write(MAX77663_I2C_ADDR, MAX77663_REG_GPIO4_DATA); +} |