treewide: unify the linker symbol reference format

Now all linker symbols are declared as type char[]. Though we can
reference the address via both the array name 'var' and its address
'&var'. It's better to unify them to avoid confusing developers.
This patch converts all '&var' linker symbol refrences to the most
commonly used format 'var'.

Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

12 files changed, 37 insertions, 37 deletions

diff --git a/arch/arc/lib/relocate.c b/arch/arc/lib/relocate.c
index 682e274f9b..fd6f4fbc93 100644
--- a/arch/arc/lib/relocate.c
+++ b/arch/arc/lib/relocate.c
@@ -13,20 +13,20 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int copy_uboot_to_ram(void)
 {
-	size_t len = (size_t)&__image_copy_end - (size_t)&__image_copy_start;
+	size_t len = (size_t)__image_copy_end - (size_t)__image_copy_start;
 
 	if (gd->flags & GD_FLG_SKIP_RELOC)
 		return 0;
 
-	memcpy((void *)gd->relocaddr, (void *)&__image_copy_start, len);
+	memcpy((void *)gd->relocaddr, (void *)__image_copy_start, len);
 
 	return 0;
 }
 
 int clear_bss(void)
 {
-	ulong dst_addr = (ulong)&__bss_start + gd->reloc_off;
-	size_t len = (size_t)&__bss_end - (size_t)&__bss_start;
+	ulong dst_addr = (ulong)__bss_start + gd->reloc_off;
+	size_t len = (size_t)__bss_end - (size_t)__bss_start;
 
 	memset((void *)dst_addr, 0x00, len);
 
@@ -38,8 +38,8 @@ int clear_bss(void)
  */
 int do_elf_reloc_fixups(void)
 {
-	Elf32_Rela *re_src = (Elf32_Rela *)(&__rel_dyn_start);
-	Elf32_Rela *re_end = (Elf32_Rela *)(&__rel_dyn_end);
+	Elf32_Rela *re_src = (Elf32_Rela *)__rel_dyn_start;
+	Elf32_Rela *re_end = (Elf32_Rela *)__rel_dyn_end;
 
 	if (gd->flags & GD_FLG_SKIP_RELOC)
 		return 0;
@@ -55,8 +55,8 @@ int do_elf_reloc_fixups(void)
 		offset_ptr_rom = (Elf32_Addr *)re_src->r_offset;
 
 		/* Check that the location of the relocation is in .text */
-		if (offset_ptr_rom >= (Elf32_Addr *)&__image_copy_start &&
-		    offset_ptr_rom < (Elf32_Addr *)&__image_copy_end) {
+		if (offset_ptr_rom >= (Elf32_Addr *)__image_copy_start &&
+		    offset_ptr_rom < (Elf32_Addr *)__image_copy_end) {
 			unsigned int val, do_swap = 0;
 			/* Switch to the in-RAM version */
 			offset_ptr_ram = (Elf32_Addr *)((ulong)offset_ptr_rom +
@@ -64,11 +64,11 @@ int do_elf_reloc_fixups(void)
 
 #ifdef __LITTLE_ENDIAN__
 			/* If location in ".text" section swap value */
-			if (((u32)offset_ptr_rom >= (u32)&__text_start &&
-			     (u32)offset_ptr_rom <= (u32)&__text_end)
+			if (((u32)offset_ptr_rom >= (u32)__text_start &&
+			     (u32)offset_ptr_rom <= (u32)__text_end)
 #if defined(__ARC700__) || defined(__ARC600__)
-			    || ((u32)offset_ptr_rom >= (u32)&__ivt_start &&
-				(u32)offset_ptr_rom <= (u32)&__ivt_end)
+			    || ((u32)offset_ptr_rom >= (u32)__ivt_start &&
+				(u32)offset_ptr_rom <= (u32)__ivt_end)
 #endif
 			   )
 				do_swap = 1;
@@ -91,8 +91,8 @@ int do_elf_reloc_fixups(void)
 				val = (val << 16) | (val >> 16);
 
 			/* Check that the target points into executable */
-			if (val < (unsigned int)&__image_copy_start ||
-			    val > (unsigned int)&__image_copy_end) {
+			if (val < (unsigned int)__image_copy_start ||
+			    val > (unsigned int)__image_copy_end) {
 				/* TODO: Use panic() instead of debug()
 				 *
 				 * For some reason GCC might generate
@@ -101,7 +101,7 @@ int do_elf_reloc_fixups(void)
 				 * ----------------------->8--------------------
 				 * static int setup_mon_len(void)
 				 * {
-				 *         gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
+				 *         gd->mon_len = (ulong)__bss_end - CONFIG_SYS_MONITOR_BASE;
 				 *         return 0;
 				 * }
 				 * ----------------------->8--------------------
diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs.c b/arch/arm/cpu/arm926ejs/mxs/mxs.c
index 4d21e3df76..6d6166cb83 100644
--- a/arch/arm/cpu/arm926ejs/mxs/mxs.c
+++ b/arch/arm/cpu/arm926ejs/mxs/mxs.c
@@ -100,7 +100,7 @@ int arch_cpu_init(void)
 	struct mxs_clkctrl_regs *clkctrl_regs =
 		(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
 
-	mx28_fixup_vt((uint32_t)&_start);
+	mx28_fixup_vt((uint32_t)_start);
 
 	/*
 	 * Enable NAND clock
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
index 5598c552ab..5e7bdb78be 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
@@ -103,7 +103,7 @@ static void mxs_spl_fixup_vectors(void)
 	 */
 
 	/* cppcheck-suppress nullPointer */
-	memcpy(0x0, &_start, 0x60);
+	memcpy(0x0, _start, 0x60);
 }
 
 static void mxs_spl_console_init(void)
diff --git a/arch/arm/mach-stm32mp/boot_params.c b/arch/arm/mach-stm32mp/boot_params.c
index 24d04dcf0f..158bf40cb9 100644
--- a/arch/arm/mach-stm32mp/boot_params.c
+++ b/arch/arm/mach-stm32mp/boot_params.c
@@ -29,7 +29,7 @@ void *board_fdt_blob_setup(int *err)
 			return (void *)nt_fw_dtb;
 		log_debug("%s: DTB not found.\n", __func__);
 	}
-	log_debug("%s: fall back to builtin DTB, %p\n", __func__, &_end);
+	log_debug("%s: fall back to builtin DTB, %p\n", __func__, _end);
 
-	return (void *)&_end;
+	return (void *)_end;
 }
diff --git a/arch/mips/lib/reloc.c b/arch/mips/lib/reloc.c
index 67c8af2f35..9cf6809f40 100644
--- a/arch/mips/lib/reloc.c
+++ b/arch/mips/lib/reloc.c
@@ -146,7 +146,7 @@ void relocate_code(ulong start_addr_sp, gd_t *new_gd, ulong relocaddr)
 
 	/* Clear the .bss section */
 	bss_start = (uint8_t *)((unsigned long)__bss_start + off);
-	bss_len = (unsigned long)&__bss_end - (unsigned long)__bss_start;
+	bss_len = (unsigned long)__bss_end - (unsigned long)__bss_start;
 	memset(bss_start, 0, bss_len);
 
 	/* Jump to the relocated U-Boot */
diff --git a/arch/mips/mach-jz47xx/jz4780/jz4780.c b/arch/mips/mach-jz47xx/jz4780/jz4780.c
index 15d1eff2ba..4584368ce8 100644
--- a/arch/mips/mach-jz47xx/jz4780/jz4780.c
+++ b/arch/mips/mach-jz47xx/jz4780/jz4780.c
@@ -42,7 +42,7 @@ void board_init_f(ulong dummy)
 	enable_caches();
 
 	/* Clear the BSS */
-	memset(__bss_start, 0, (char *)&__bss_end - __bss_start);
+	memset(__bss_start, 0, (size_t)__bss_end - (size_t)__bss_start);
 
 	gd->flags |= GD_FLG_SPL_INIT;
 
diff --git a/arch/mips/mach-mtmips/mt7621/spl/launch.c b/arch/mips/mach-mtmips/mt7621/spl/launch.c
index 37c20a5f56..95dd65913d 100644
--- a/arch/mips/mach-mtmips/mt7621/spl/launch.c
+++ b/arch/mips/mach-mtmips/mt7621/spl/launch.c
@@ -70,7 +70,7 @@ void secondary_cpu_init(void)
 		cpumask = 0x0f;
 
 		/* Make BootROM/TPL redirect Core1's bootup flow to our entry point */
-		writel((uintptr_t)&_start, sysc + BOOT_SRAM_BASE_REG);
+		writel((uintptr_t)_start, sysc + BOOT_SRAM_BASE_REG);
 
 		bootup_secondary_core();
 	}
diff --git a/arch/mips/mach-mtmips/mt7621/spl/spl.c b/arch/mips/mach-mtmips/mt7621/spl/spl.c
index aa5b267bb9..25b409e241 100644
--- a/arch/mips/mach-mtmips/mt7621/spl/spl.c
+++ b/arch/mips/mach-mtmips/mt7621/spl/spl.c
@@ -86,7 +86,7 @@ unsigned long spl_nor_get_uboot_base(void)
 
 uint32_t spl_nand_get_uboot_raw_page(void)
 {
-	const struct stage_header *sh = (const struct stage_header *)&_start;
+	const struct stage_header *sh = (const struct stage_header *)_start;
 	u32 addr;
 
 	addr = image_get_header_size() + be32_to_cpu(sh->stage_size);
diff --git a/arch/riscv/cpu/jh7110/spl.c b/arch/riscv/cpu/jh7110/spl.c
index 72adcefa0e..7da6c261bc 100644
--- a/arch/riscv/cpu/jh7110/spl.c
+++ b/arch/riscv/cpu/jh7110/spl.c
@@ -77,8 +77,8 @@ void harts_early_init(void)
 	 * If it is not cleared, the ECC part is invalid, and an ECC error
 	 * will be reported when reading data.
 	 */
-	ptr = (ulong *)&__bss_end;
-	len = L2_LIM_MEM_END - (ulong)&__bss_end;
+	ptr = (ulong *)__bss_end;
+	len = L2_LIM_MEM_END - (ulong)__bss_end;
 	remain = len % sizeof(ulong);
 	len /= sizeof(ulong);
 
diff --git a/arch/x86/lib/relocate.c b/arch/x86/lib/relocate.c
index 5b1b420a64..da819b9bdd 100644
--- a/arch/x86/lib/relocate.c
+++ b/arch/x86/lib/relocate.c
@@ -26,11 +26,11 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int copy_uboot_to_ram(void)
 {
-	size_t len = (uintptr_t)&__data_end - (uintptr_t)&__text_start;
+	size_t len = (uintptr_t)__data_end - (uintptr_t)__text_start;
 
 	if (gd->flags & GD_FLG_SKIP_RELOC)
 		return 0;
-	memcpy((void *)gd->relocaddr, (void *)&__text_start, len);
+	memcpy((void *)gd->relocaddr, (void *)__text_start, len);
 
 	return 0;
 }
@@ -38,8 +38,8 @@ int copy_uboot_to_ram(void)
 #ifndef CONFIG_EFI_APP
 int clear_bss(void)
 {
-	ulong dst_addr = (ulong)&__bss_start + gd->reloc_off;
-	size_t len = (uintptr_t)&__bss_end - (uintptr_t)&__bss_start;
+	ulong dst_addr = (ulong)__bss_start + gd->reloc_off;
+	size_t len = (uintptr_t)__bss_end - (uintptr_t)__bss_start;
 
 	if (gd->flags & GD_FLG_SKIP_RELOC)
 		return 0;
@@ -150,12 +150,12 @@ static void do_elf_reloc_fixups32(unsigned int text_base, uintptr_t size,
  */
 int do_elf_reloc_fixups(void)
 {
-	void *re_src = (void *)(&__rel_dyn_start);
-	void *re_end = (void *)(&__rel_dyn_end);
+	void *re_src = (void *)__rel_dyn_start;
+	void *re_end = (void *)__rel_dyn_end;
 	uint text_base;
 
 	/* The size of the region of u-boot that runs out of RAM. */
-	uintptr_t size = (uintptr_t)&__bss_end - (uintptr_t)&__text_start;
+	uintptr_t size = (uintptr_t)__bss_end - (uintptr_t)__text_start;
 
 	if (gd->flags & GD_FLG_SKIP_RELOC)
 		return 0;
diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c
index b6812bb8ca..73512d3d4c 100644
--- a/arch/x86/lib/spl.c
+++ b/arch/x86/lib/spl.c
@@ -138,9 +138,9 @@ static int x86_spl_init(void)
 
 #ifndef CONFIG_SYS_COREBOOT
 	log_debug("bss\n");
-	debug("BSS clear from %lx to %lx len %lx\n", (ulong)&__bss_start,
-	      (ulong)&__bss_end, (ulong)&__bss_end - (ulong)&__bss_start);
-	memset(&__bss_start, 0, (ulong)&__bss_end - (ulong)&__bss_start);
+	debug("BSS clear from %lx to %lx len %lx\n", (ulong)__bss_start,
+	      (ulong)__bss_end, (ulong)__bss_end - (ulong)__bss_start);
+	memset(__bss_start, 0, (ulong)__bss_end - (ulong)__bss_start);
 # ifndef CONFIG_TPL
 
 	/* TODO(sjg@chromium.org): Consider calling cpu_init_r() here */
diff --git a/arch/xtensa/lib/relocate.c b/arch/xtensa/lib/relocate.c
index 3dc8edc801..a499590c75 100644
--- a/arch/xtensa/lib/relocate.c
+++ b/arch/xtensa/lib/relocate.c
@@ -9,8 +9,8 @@
 
 int clear_bss(void)
 {
-	size_t len = (size_t)&__bss_end - (size_t)&__bss_start;
+	size_t len = (size_t)__bss_end - (size_t)__bss_start;
 
-	memset((void *)&__bss_start, 0x00, len);
+	memset((void *)__bss_start, 0x00, len);
 	return 0;
 }