Merge branch '2023-05-30-TI-fixes-Apple-M2-support'

- Fixes for some TI K3 platforms and merge the Apple M2 support I had
  intended to pick up earlier.

6 files changed, 141 insertions, 14 deletions

diff --git a/arch/arm/mach-apple/board.c b/arch/arm/mach-apple/board.c
index 1604642312..d501948118 100644
--- a/arch/arm/mach-apple/board.c
+++ b/arch/arm/mach-apple/board.c
@@ -343,6 +343,107 @@ static struct mm_region t6002_mem_map[] = {
 	}
 };
 
+/* Apple M2 Pro/Max */
+
+static struct mm_region t6020_mem_map[] = {
+	{
+		/* I/O */
+		.virt = 0x280000000,
+		.phys = 0x280000000,
+		.size = SZ_1G,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {
+		/* I/O */
+		.virt = 0x340000000,
+		.phys = 0x340000000,
+		.size = SZ_1G,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {
+		/* I/O */
+		.virt = 0x380000000,
+		.phys = 0x380000000,
+		.size = SZ_1G,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {
+		/* I/O */
+		.virt = 0x580000000,
+		.phys = 0x580000000,
+		.size = SZ_512M,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {
+		/* PCIE */
+		.virt = 0x5a0000000,
+		.phys = 0x5a0000000,
+		.size = SZ_512M,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRE) |
+			 PTE_BLOCK_INNER_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {
+		/* PCIE */
+		.virt = 0x5c0000000,
+		.phys = 0x5c0000000,
+		.size = SZ_1G,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRE) |
+			 PTE_BLOCK_INNER_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {
+		/* I/O */
+		.virt = 0x700000000,
+		.phys = 0x700000000,
+		.size = SZ_1G,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {
+		/* I/O */
+		.virt = 0xb00000000,
+		.phys = 0xb00000000,
+		.size = SZ_1G,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {
+		/* I/O */
+		.virt = 0xf00000000,
+		.phys = 0xf00000000,
+		.size = SZ_1G,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {
+		/* I/O */
+		.virt = 0x1300000000,
+		.phys = 0x1300000000,
+		.size = SZ_1G,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {
+		/* RAM */
+		.virt = 0x10000000000,
+		.phys = 0x10000000000,
+		.size = 16UL * SZ_1G,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+			 PTE_BLOCK_INNER_SHARE
+	}, {
+		/* Framebuffer */
+		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
+			 PTE_BLOCK_INNER_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {
+		/* List terminator */
+		0,
+	}
+};
+
 struct mm_region *mem_map;
 
 int board_init(void)
@@ -379,12 +480,14 @@ void build_mem_map(void)
 	if (of_machine_is_compatible("apple,t8103") ||
 	    of_machine_is_compatible("apple,t8112"))
 		mem_map = t8103_mem_map;
-	else if (of_machine_is_compatible("apple,t6000"))
-		mem_map = t6000_mem_map;
-	else if (of_machine_is_compatible("apple,t6001"))
+	else if (of_machine_is_compatible("apple,t6000") ||
+		 of_machine_is_compatible("apple,t6001"))
 		mem_map = t6000_mem_map;
 	else if (of_machine_is_compatible("apple,t6002"))
 		mem_map = t6002_mem_map;
+	else if (of_machine_is_compatible("apple,t6020") ||
+		 of_machine_is_compatible("apple,t6021"))
+		mem_map = t6020_mem_map;
 	else
 		panic("Unsupported SoC\n");
 
diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
index 0ffbbf9168..bae0a827c2 100644
--- a/arch/arm/mach-k3/Kconfig
+++ b/arch/arm/mach-k3/Kconfig
@@ -52,7 +52,8 @@ config SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE
 config SYS_K3_MCU_SCRATCHPAD_BASE
 	hex
 	default 0x40280000 if SOC_K3_AM654
-	default 0x41cff9fc if SOC_K3_J721E || SOC_K3_J721S2
+	default 0x40280000 if SOC_K3_J721S2
+	default 0x41cff9fc if SOC_K3_J721E
 	help
 	  Describes the base address of MCU Scratchpad RAM.
 
@@ -140,8 +141,7 @@ config K3_SYSFW_IMAGE_MMCSD_RAW_MODE_PART
 config K3_SYSFW_IMAGE_SIZE_MAX
 	int "Amount of memory dynamically allocated for loading SYSFW blob"
 	depends on K3_LOAD_SYSFW
-	default 163840 if SOC_K3_AM625 || SOC_K3_AM62A7
-	default	278000
+	default	280000
 	help
 	  Amount of memory (in bytes) reserved through dynamic allocation at
 	  runtime for loading the combined System Firmware and configuration image
diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
index 3c85caee57..34737a43aa 100644
--- a/arch/arm/mach-k3/common.c
+++ b/arch/arm/mach-k3/common.c
@@ -347,8 +347,13 @@ void board_fit_image_post_process(const void *fit, int node, void **p_image,
 	if ((i != IMAGE_ID_ATF) && (i != IMAGE_ID_OPTEE))
 #endif
 	{
+		ti_secure_image_check_binary(p_image, p_size);
 		ti_secure_image_post_process(p_image, p_size);
 	}
+#if IS_ENABLED(CONFIG_SYS_K3_SPL_ATF)
+	else
+		ti_secure_image_check_binary(p_image, p_size);
+#endif
 }
 #endif
 
diff --git a/arch/arm/mach-k3/common.h b/arch/arm/mach-k3/common.h
index e7e59f533b..899be64a50 100644
--- a/arch/arm/mach-k3/common.h
+++ b/arch/arm/mach-k3/common.h
@@ -41,3 +41,4 @@ enum k3_device_type get_device_type(void);
 void ti_secure_image_post_process(void **p_image, size_t *p_size);
 struct ti_sci_handle *get_ti_sci_handle(void);
 void do_board_detect(void);
+void ti_secure_image_check_binary(void **p_image, size_t *p_size);
diff --git a/arch/arm/mach-k3/config.mk b/arch/arm/mach-k3/config.mk
index 9306f2627d..cbf9c10210 100644
--- a/arch/arm/mach-k3/config.mk
+++ b/arch/arm/mach-k3/config.mk
@@ -68,6 +68,8 @@ ifeq ($(CONFIG_TI_SECURE_DEVICE),y)
 SPL_ITS := u-boot-spl-k3_HS.its
 $(SPL_ITS): export IS_HS=1
 INPUTS-y	+= tispl.bin_HS
+INPUTS-y	+= tispl.bin
+tispl.bin: $(obj)/u-boot-spl-nodtb.bin_HS $(patsubst %,$(obj)/dts/%.dtb_HS,$(subst ",,$(CONFIG_SPL_OF_LIST)))
 else
 SPL_ITS := u-boot-spl-k3.its
 INPUTS-y	+= tispl.bin
diff --git a/arch/arm/mach-k3/security.c b/arch/arm/mach-k3/security.c
index 6179f7373a..02a2c12dbd 100644
--- a/arch/arm/mach-k3/security.c
+++ b/arch/arm/mach-k3/security.c
@@ -38,19 +38,16 @@ static size_t ti_secure_cert_length(void *p_image)
 	return seq_length + 4;
 }
 
-void ti_secure_image_post_process(void **p_image, size_t *p_size)
+void ti_secure_image_check_binary(void **p_image, size_t *p_size)
 {
-	struct ti_sci_handle *ti_sci = get_ti_sci_handle();
-	struct ti_sci_proc_ops *proc_ops = &ti_sci->ops.proc_ops;
-	size_t cert_length;
-	u64 image_addr;
 	u32 image_size;
-	int ret;
-
+	size_t cert_length;
 	image_size = *p_size;
 
-	if (!image_size)
+	if (!image_size) {
+		debug("%s: Image size is %d\n", __func__, image_size);
 		return;
+	}
 
 	if (get_device_type() == K3_DEVICE_TYPE_GP) {
 		if (ti_secure_cert_detected(*p_image)) {
@@ -78,6 +75,25 @@ void ti_secure_image_post_process(void **p_image, size_t *p_size)
 		       "This will fail on Security Enforcing(HS-SE) devices\n");
 		return;
 	}
+}
+
+void ti_secure_image_post_process(void **p_image, size_t *p_size)
+{
+	struct ti_sci_handle *ti_sci = get_ti_sci_handle();
+	struct ti_sci_proc_ops *proc_ops = &ti_sci->ops.proc_ops;
+	u64 image_addr;
+	u32 image_size;
+	int ret;
+
+	image_size = *p_size;
+	if (!image_size) {
+		debug("%s: Image size is %d\n", __func__, image_size);
+		return;
+	}
+
+	if (get_device_type() != K3_DEVICE_TYPE_HS_SE &&
+	    get_device_type() != K3_DEVICE_TYPE_HS_FS)
+		return;
 
 	/* Clean out image so it can be seen by system firmware */
 	image_addr = dma_map_single(*p_image, *p_size, DMA_BIDIRECTIONAL);