diff options
author | Tom Rini <trini@konsulko.com> | 2021-10-07 09:00:45 -0400 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2021-10-07 09:00:45 -0400 |
commit | 11a69a9ef3f5eaccdca4dd89c7d8d91bd5b3b904 (patch) | |
tree | 75ea296bb71b6f5ab86b82979304576f04caaa66 /arch | |
parent | ea67f467a43e4c8852bd1ce1bb75f5dc6c3788d1 (diff) | |
parent | 1b2b52f29402b5aaccccadfe4ba11bd3f29bd414 (diff) |
Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
- Reset improvements, enable coherence manager on ae350, k210 clk
improvements, other fixes
Diffstat (limited to 'arch')
-rw-r--r-- | arch/riscv/cpu/ax25/cpu.c | 42 | ||||
-rw-r--r-- | arch/riscv/cpu/cpu.c | 13 | ||||
-rw-r--r-- | arch/riscv/include/asm/sbi.h | 40 | ||||
-rw-r--r-- | arch/riscv/lib/fdt_fixup.c | 5 | ||||
-rw-r--r-- | arch/riscv/lib/sbi.c | 12 |
5 files changed, 105 insertions, 7 deletions
diff --git a/arch/riscv/cpu/ax25/cpu.c b/arch/riscv/cpu/ax25/cpu.c index f092600e14..c4c2de2ef0 100644 --- a/arch/riscv/cpu/ax25/cpu.c +++ b/arch/riscv/cpu/ax25/cpu.c @@ -9,6 +9,22 @@ #include <cpu_func.h> #include <irq_func.h> #include <asm/cache.h> +#include <asm/csr.h> + +#define CSR_MCACHE_CTL 0x7ca +#define CSR_MMISC_CTL 0x7d0 +#define CSR_MARCHID 0xf12 + +#define V5_MCACHE_CTL_IC_EN_OFFSET 0 +#define V5_MCACHE_CTL_DC_EN_OFFSET 1 +#define V5_MCACHE_CTL_DC_COHEN_OFFSET 19 +#define V5_MCACHE_CTL_DC_COHSTA_OFFSET 20 + +#define V5_MCACHE_CTL_IC_EN BIT(V5_MCACHE_CTL_IC_EN_OFFSET) +#define V5_MCACHE_CTL_DC_EN BIT(V5_MCACHE_CTL_DC_EN_OFFSET) +#define V5_MCACHE_CTL_DC_COHEN_EN BIT(V5_MCACHE_CTL_DC_COHEN_OFFSET) +#define V5_MCACHE_CTL_DC_COHSTA_EN BIT(V5_MCACHE_CTL_DC_COHSTA_OFFSET) + /* * cleanup_before_linux() is called just before we call linux @@ -27,3 +43,29 @@ int cleanup_before_linux(void) return 0; } + +void harts_early_init(void) +{ + if (CONFIG_IS_ENABLED(RISCV_MMODE)) { + unsigned long long mcache_ctl_val = csr_read(CSR_MCACHE_CTL); + + if (!(mcache_ctl_val & V5_MCACHE_CTL_DC_COHEN_EN)) + mcache_ctl_val |= V5_MCACHE_CTL_DC_COHEN_EN; + if (!(mcache_ctl_val & V5_MCACHE_CTL_IC_EN)) + mcache_ctl_val |= V5_MCACHE_CTL_IC_EN; + if (!(mcache_ctl_val & V5_MCACHE_CTL_DC_EN)) + mcache_ctl_val |= V5_MCACHE_CTL_DC_EN; + csr_write(CSR_MCACHE_CTL, mcache_ctl_val); + + /* + * Check DC_COHEN_EN, if cannot write to mcache_ctl, + * we assume this bitmap not support L2 CM + */ + mcache_ctl_val = csr_read(CSR_MCACHE_CTL); + if ((mcache_ctl_val & V5_MCACHE_CTL_DC_COHEN_EN)) { + /* Wait for DC_COHSTA bit be set */ + while (!(mcache_ctl_val & V5_MCACHE_CTL_DC_COHSTA_EN)) + mcache_ctl_val = csr_read(CSR_MCACHE_CTL); + } + } +} diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c index c894ac10b5..8e49b6d736 100644 --- a/arch/riscv/cpu/cpu.c +++ b/arch/riscv/cpu/cpu.c @@ -6,6 +6,7 @@ #include <common.h> #include <cpu.h> #include <dm.h> +#include <dm/lists.h> #include <init.h> #include <log.h> #include <asm/encoding.h> @@ -138,7 +139,17 @@ int arch_cpu_init_dm(void) int arch_early_init_r(void) { - return riscv_cpu_probe(); + int ret; + + ret = riscv_cpu_probe(); + if (ret) + return ret; + + if (IS_ENABLED(CONFIG_SYSRESET_SBI)) + device_bind_driver(gd->dm_root, "sbi-sysreset", + "sbi-sysreset", NULL); + + return 0; } /** diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h index 53ca316180..5030892b47 100644 --- a/arch/riscv/include/asm/sbi.h +++ b/arch/riscv/include/asm/sbi.h @@ -12,7 +12,6 @@ #include <linux/types.h> enum sbi_ext_id { -#ifdef CONFIG_SBI_V01 SBI_EXT_0_1_SET_TIMER = 0x0, SBI_EXT_0_1_CONSOLE_PUTCHAR = 0x1, SBI_EXT_0_1_CONSOLE_GETCHAR = 0x2, @@ -22,11 +21,12 @@ enum sbi_ext_id { SBI_EXT_0_1_REMOTE_SFENCE_VMA = 0x6, SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID = 0x7, SBI_EXT_0_1_SHUTDOWN = 0x8, -#endif SBI_EXT_BASE = 0x10, SBI_EXT_TIME = 0x54494D45, SBI_EXT_IPI = 0x735049, SBI_EXT_RFENCE = 0x52464E43, + SBI_EXT_HSM = 0x48534D, + SBI_EXT_SRST = 0x53525354, }; enum sbi_ext_base_fid { @@ -51,6 +51,41 @@ enum sbi_ext_rfence_fid { SBI_EXT_RFENCE_REMOTE_FENCE_I = 0, SBI_EXT_RFENCE_REMOTE_SFENCE_VMA, SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID, + SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID, + SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA, + SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID, + SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA, +}; + +enum sbi_ext_hsm_fid { + SBI_EXT_HSM_HART_START = 0, + SBI_EXT_HSM_HART_STOP, + SBI_EXT_HSM_HART_STATUS, + SBI_EXT_HSM_HART_SUSPEND, +}; + +enum sbi_hsm_hart_status { + SBI_HSM_HART_STATUS_STARTED = 0, + SBI_HSM_HART_STATUS_STOPPED, + SBI_HSM_HART_STATUS_START_PENDING, + SBI_HSM_HART_STATUS_STOP_PENDING, + SBI_HSM_HART_STATUS_SUSPEND_PENDING, + SBI_HSM_HART_STATUS_RESUME_PENDING, +}; + +enum sbi_ext_srst_fid { + SBI_EXT_SRST_RESET = 0, +}; + +enum sbi_srst_reset_type { + SBI_SRST_RESET_TYPE_SHUTDOWN = 0, + SBI_SRST_RESET_TYPE_COLD_REBOOT, + SBI_SRST_RESET_TYPE_WARM_REBOOT, +}; + +enum sbi_srst_reset_reason { + SBI_SRST_RESET_REASON_NONE = 0, + SBI_SRST_RESET_REASON_SYS_FAILURE, }; #ifdef CONFIG_SBI_V01 @@ -118,5 +153,6 @@ void sbi_set_timer(uint64_t stime_value); long sbi_get_spec_version(void); int sbi_get_impl_id(void); int sbi_probe_extension(int ext); +void sbi_srst_reset(unsigned long type, unsigned long reason); #endif diff --git a/arch/riscv/lib/fdt_fixup.c b/arch/riscv/lib/fdt_fixup.c index f636b28449..61cf893526 100644 --- a/arch/riscv/lib/fdt_fixup.c +++ b/arch/riscv/lib/fdt_fixup.c @@ -31,7 +31,6 @@ int riscv_fdt_copy_resv_mem_node(const void *src, void *dst) fdt_addr_t addr; fdt_size_t size; int offset, node, err, rmem_offset; - bool nomap = true; char basename[32] = {0}; int bname_len; int max_len = sizeof(basename); @@ -81,9 +80,7 @@ int riscv_fdt_copy_resv_mem_node(const void *src, void *dst) log_err("failed to add reserved memory: %d\n", err); return err; } - if (!fdt_getprop(src, node, "no-map", NULL)) - nomap = false; - if (nomap) { + if (fdt_getprop(src, node, "no-map", NULL)) { rmem_offset = fdt_node_offset_by_phandle(dst, phandle); fdt_setprop_empty(dst, rmem_offset, "no-map"); } diff --git a/arch/riscv/lib/sbi.c b/arch/riscv/lib/sbi.c index 77845a73ca..2b53896b8a 100644 --- a/arch/riscv/lib/sbi.c +++ b/arch/riscv/lib/sbi.c @@ -108,6 +108,18 @@ int sbi_probe_extension(int extid) return -ENOTSUPP; } +/** + * sbi_srst_reset() - invoke system reset extension + * + * @type: type of reset + * @reason: reason for reset + */ +void sbi_srst_reset(unsigned long type, unsigned long reason) +{ + sbi_ecall(SBI_EXT_SRST, SBI_EXT_SRST_RESET, type, reason, + 0, 0, 0, 0); +} + #ifdef CONFIG_SBI_V01 /** |