diff options
| author | Tom Rini <trini@konsulko.com> | 2022-01-10 14:01:57 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-01-10 14:01:57 -0500 |
| commit | fe04d885fb540b614a2f989e16e808b300ccb52e (patch) | |
| tree | 613d413c36bda908658fe4c6a24fb1a61de716ce /arch/xtensa/lib/time.c | |
| parent | d637294e264adfeb29f390dfc393106fd4d41b17 (diff) | |
| parent | 0dadad6d7c5769d6258baeaf1b8db843b0dfa01f (diff) | |
Merge branch 'next'
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/xtensa/lib/time.c')
| -rw-r--r-- | arch/xtensa/lib/time.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/xtensa/lib/time.c b/arch/xtensa/lib/time.c index 3a02c38493..1c927d2a6a 100644 --- a/arch/xtensa/lib/time.c +++ b/arch/xtensa/lib/time.c @@ -4,6 +4,7 @@ */ #include <common.h> +#include <clock_legacy.h> #include <time.h> #include <asm/global_data.h> #include <linux/delay.h> @@ -51,7 +52,7 @@ static void delay_cycles(unsigned cycles) void __udelay(unsigned long usec) { ulong lo, hi, i; - ulong mhz = CONFIG_SYS_CLK_FREQ / 1000000; + ulong mhz = get_board_sys_clk() / 1000000; /* Scale to support full 32-bit usec range */ @@ -74,7 +75,7 @@ ulong get_timer(ulong base) #if XCHAL_HAVE_CCOUNT register ulong ccount; __asm__ volatile ("rsr %0, CCOUNT" : "=a"(ccount)); - return ccount / (CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ) - base; + return ccount / (get_board_sys_clk() / CONFIG_SYS_HZ) - base; #else /* * Add at least the overhead of this call (in cycles). @@ -85,7 +86,7 @@ ulong get_timer(ulong base) */ fake_ccount += 20; - return fake_ccount / (CONFIG_SYS_CLK_FREQ / CONFIG_SYS_HZ) - base; + return fake_ccount / (get_board_sys_clk() / CONFIG_SYS_HZ) - base; #endif } @@ -114,6 +115,6 @@ unsigned long timer_get_us(void) unsigned long ccount; __asm__ volatile ("rsr %0, CCOUNT" : "=a"(ccount)); - return ccount / (CONFIG_SYS_CLK_FREQ / 1000000); + return ccount / (get_board_sys_clk() / 1000000); } #endif |