Merge branch '2022-10-31-vbe-implement-the-full-firmware-flow'

To quote Simon:
This series provides an implementation of VBE from TPL through to U-Boot
proper, using VBE to load the relevant firmware stages. It buils a single
image.bin file containing all the phases:

   TPL - initial phase, loads VPL using binman symbols
   VPL - main firmware phase, loads SPL using VBE parameters
   SPL - loads U-Boot proper using VBE parameters
   U-Boot - final firmware phase, where OS booting is processed

This series does not include the OS-booting phase. That will be the
subject of a future series.

The implementation is entirely handled by sandbox. It should be possible
to enable this on a real board without much effort, but that is also the
subject of a future series.

8 files changed, 16 insertions, 16 deletions

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index a2da080eae..93f1c77be3 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -924,8 +924,8 @@ config CACHE_QOS_SIZE_PER_BIT
 
 config X86_OFFSET_U_BOOT
 	hex "Offset of U-Boot in ROM image"
-	depends on HAVE_SYS_TEXT_BASE
-	default SYS_TEXT_BASE
+	depends on HAVE_TEXT_BASE
+	default TEXT_BASE
 
 config X86_OFFSET_SPL
 	hex "Offset of SPL in ROM image"
diff --git a/arch/x86/cpu/apollolake/spl.c b/arch/x86/cpu/apollolake/spl.c
index f2d25734c6..6078d5a200 100644
--- a/arch/x86/cpu/apollolake/spl.c
+++ b/arch/x86/cpu/apollolake/spl.c
@@ -118,7 +118,7 @@ static int spl_fast_spi_load_image(struct spl_image_info *spl_image,
 
 	spl_image->size = CONFIG_SYS_MONITOR_LEN;  /* We don't know SPL size */
 	spl_image->entry_point = spl_phase() == PHASE_TPL ?
-		CONFIG_SPL_TEXT_BASE : CONFIG_SYS_TEXT_BASE;
+		CONFIG_SPL_TEXT_BASE : CONFIG_TEXT_BASE;
 	spl_image->load_addr = spl_image->entry_point;
 	spl_image->os = IH_OS_U_BOOT;
 	spl_image->name = "U-Boot";
diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c
index e016fae04f..0a1fbb34d4 100644
--- a/arch/x86/cpu/quark/quark.c
+++ b/arch/x86/cpu/quark/quark.c
@@ -49,7 +49,7 @@ static void quark_setup_mtrr(void)
 
 	/* variable range MTRR#0: ROM area */
 	mask = ~(CONFIG_SYS_MONITOR_LEN - 1);
-	base = CONFIG_SYS_TEXT_BASE & mask;
+	base = CONFIG_TEXT_BASE & mask;
 	msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_VAR_PHYBASE(MTRR_VAR_ROM),
 		       base | MTRR_TYPE_WRBACK);
 	msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_VAR_PHYMASK(MTRR_VAR_ROM),
diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S
index 897fd926c0..0ef27cc5a0 100644
--- a/arch/x86/cpu/start.S
+++ b/arch/x86/cpu/start.S
@@ -237,15 +237,15 @@ multiboot_header:
 	/* checksum */
 	.long	-0x1BADB002 - (1 << 16)
 	/* header addr */
-	.long	multiboot_header - _x86boot_start + CONFIG_SYS_TEXT_BASE
+	.long	multiboot_header - _x86boot_start + CONFIG_TEXT_BASE
 	/* load addr */
-	.long	CONFIG_SYS_TEXT_BASE
+	.long	CONFIG_TEXT_BASE
 	/* load end addr */
 	.long	0
 	/* bss end addr */
 	.long	0
 	/* entry addr */
-	.long	CONFIG_SYS_TEXT_BASE
+	.long	CONFIG_TEXT_BASE
 
 #ifdef CONFIG_X86_LOAD_FROM_32_BIT
 	/*
diff --git a/arch/x86/cpu/u-boot-64.lds b/arch/x86/cpu/u-boot-64.lds
index 53c56043a9..d0398ff00d 100644
--- a/arch/x86/cpu/u-boot-64.lds
+++ b/arch/x86/cpu/u-boot-64.lds
@@ -15,8 +15,8 @@ SECTIONS
 	/DISCARD/ : { *(__u_boot_list_2_cmd_*) }
 #endif
 
-#ifdef CONFIG_SYS_TEXT_BASE
-	. = CONFIG_SYS_TEXT_BASE;	/* Location of bootcode in flash */
+#ifdef CONFIG_TEXT_BASE
+	. = CONFIG_TEXT_BASE;	/* Location of bootcode in flash */
 #endif
 	__text_start = .;
 
diff --git a/arch/x86/cpu/u-boot.lds b/arch/x86/cpu/u-boot.lds
index 7c87209834..a31f4220a0 100644
--- a/arch/x86/cpu/u-boot.lds
+++ b/arch/x86/cpu/u-boot.lds
@@ -15,7 +15,7 @@ SECTIONS
 	/DISCARD/ : { *(__u_boot_list_2_cmd_*) }
 #endif
 
-	. = CONFIG_SYS_TEXT_BASE;	/* Location of bootcode in flash */
+	. = CONFIG_TEXT_BASE;	/* Location of bootcode in flash */
 	__text_start = .;
 
 	.text.start : { *(.text.start); }
diff --git a/arch/x86/lib/relocate.c b/arch/x86/lib/relocate.c
index 9060d19d46..5b1b420a64 100644
--- a/arch/x86/lib/relocate.c
+++ b/arch/x86/lib/relocate.c
@@ -162,10 +162,10 @@ int do_elf_reloc_fixups(void)
 	if (re_src == re_end)
 		panic("No relocation data");
 
-#ifdef CONFIG_SYS_TEXT_BASE
-	text_base = CONFIG_SYS_TEXT_BASE;
+#ifdef CONFIG_TEXT_BASE
+	text_base = CONFIG_TEXT_BASE;
 #else
-	panic("No CONFIG_SYS_TEXT_BASE");
+	panic("No CONFIG_TEXT_BASE");
 #endif
 #if CONFIG_IS_ENABLED(X86_64)
 	do_elf_reloc_fixups64(text_base, size, re_src, re_end);
diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c
index 2d50c62964..34ef68f2bb 100644
--- a/arch/x86/lib/spl.c
+++ b/arch/x86/lib/spl.c
@@ -66,7 +66,7 @@ static int x86_spl_init(void)
 	 * TODO(sjg@chromium.org): We use this area of RAM for the stack
 	 * and global_data in SPL. Once U-Boot starts up and releocates it
 	 * is not needed. We could make this a CONFIG option or perhaps
-	 * place it immediately below CONFIG_SYS_TEXT_BASE.
+	 * place it immediately below CONFIG_TEXT_BASE.
 	 */
 	__maybe_unused char *ptr = (char *)0x110000;
 #else
@@ -209,8 +209,8 @@ static int spl_board_load_image(struct spl_image_info *spl_image,
 				struct spl_boot_device *bootdev)
 {
 	spl_image->size = CONFIG_SYS_MONITOR_LEN;
-	spl_image->entry_point = CONFIG_SYS_TEXT_BASE;
-	spl_image->load_addr = CONFIG_SYS_TEXT_BASE;
+	spl_image->entry_point = CONFIG_TEXT_BASE;
+	spl_image->load_addr = CONFIG_TEXT_BASE;
 	spl_image->os = IH_OS_U_BOOT;
 	spl_image->name = "U-Boot";