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authorTom Rini <trini@konsulko.com>2020-07-17 08:04:48 -0400
committerTom Rini <trini@konsulko.com>2020-07-17 08:04:48 -0400
commit7c3cc6f106ed1ca13b0ff6eea9f8e1473240aef3 (patch)
tree8c67a8ed3ab24b1421161960103d8614cbde659a /arch/x86/lib/coreboot_table.c
parent42e7659db0ac7089d3a2f80ee1c3b8eb64d84706 (diff)
parentd40d2c570600396b54dece16429727ef50cfeef0 (diff)
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- New timer API to allow delays with a 32-bit microsecond timer - Add dynamic ACPI structs (DSDT/SSDT) generations to the DM core - x86: Enable ACPI table generation by default - x86: Enable the copy framebuffer on Coral - x86: A few fixes to FSP2 with ApolloLake - x86: Drop setup_pcat_compatibility() - x86: Primary-to-Sideband Bus minor fixes
Diffstat (limited to 'arch/x86/lib/coreboot_table.c')
-rw-r--r--arch/x86/lib/coreboot_table.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/x86/lib/coreboot_table.c b/arch/x86/lib/coreboot_table.c
index 331c1b7e5a..6cd3244301 100644
--- a/arch/x86/lib/coreboot_table.c
+++ b/arch/x86/lib/coreboot_table.c
@@ -21,11 +21,11 @@ int high_table_reserve(void)
gd->arch.high_table_ptr = gd->start_addr_sp;
/* clear the memory */
-#ifdef CONFIG_HAVE_ACPI_RESUME
- if (gd->arch.prev_sleep_state != ACPI_S3)
-#endif
+ if (IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) &&
+ gd->arch.prev_sleep_state != ACPI_S3) {
memset((void *)gd->arch.high_table_ptr, 0,
CONFIG_HIGH_TABLE_SIZE);
+ }
gd->start_addr_sp &= ~0xf;