diff options
author | Tom Rini <trini@konsulko.com> | 2019-12-18 07:20:19 -0500 |
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committer | Tom Rini <trini@konsulko.com> | 2019-12-18 07:20:19 -0500 |
commit | c0912f9bbfb26dd03d189953678691b799d35b6e (patch) | |
tree | f879600cd26b8d4678a174854b623941e5dc2ada /arch/x86/include/asm/mrccache.h | |
parent | 533c9f5714bdba79dc6f2629284d4c1a08a611d1 (diff) | |
parent | a1d6dc3f84071f05574044f337dbdca70fae495d (diff) |
Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-x86 into next
- Various x86 common codes updated for TPL/SPL
- I2C designware driver updated for PCI
- ICH SPI driver updated to support Apollo Lake
- Add Intel FSP2 base support
- Intel Apollo Lake platform specific drivers support
- Add a new board Google Chromebook Coral
Diffstat (limited to 'arch/x86/include/asm/mrccache.h')
-rw-r--r-- | arch/x86/include/asm/mrccache.h | 29 |
1 files changed, 12 insertions, 17 deletions
diff --git a/arch/x86/include/asm/mrccache.h b/arch/x86/include/asm/mrccache.h index 40fda856ff..d6b7529073 100644 --- a/arch/x86/include/asm/mrccache.h +++ b/arch/x86/include/asm/mrccache.h @@ -7,7 +7,7 @@ #ifndef _ASM_MRCCACHE_H #define _ASM_MRCCACHE_H -#define MRC_DATA_ALIGN 0x1000 +#define MRC_DATA_ALIGN 0x100 #define MRC_DATA_SIGNATURE (('M' << 0) | ('R' << 8) | \ ('C' << 16) | ('D'<<24)) @@ -27,6 +27,14 @@ struct mrc_region { u32 length; }; +/* Types of MRC data */ +enum mrc_type_t { + MRC_TYPE_NORMAL, + MRC_TYPE_VAR, + + MRC_TYPE_COUNT, +}; + struct udevice; /** @@ -41,21 +49,6 @@ struct udevice; struct mrc_data_container *mrccache_find_current(struct mrc_region *entry); /** - * mrccache_update() - update the MRC cache with a new record - * - * This writes a new record to the end of the MRC cache region. If the new - * record is the same as the latest record then the write is skipped - * - * @sf: SPI flash to write to - * @entry: Position and size of MRC cache in SPI flash - * @cur: Record to write - * @return 0 if updated, -EEXIST if the record is the same as the latest - * record, -EINVAL if the record is not valid, other error if SPI write failed - */ -int mrccache_update(struct udevice *sf, struct mrc_region *entry, - struct mrc_data_container *cur); - -/** * mrccache_reserve() - reserve MRC data on the stack * * This copies MRC data pointed by gd->arch.mrc_output to a new place on the @@ -84,6 +77,7 @@ int mrccache_reserve(void); * triggers PCI bus enumeration during which insufficient memory issue * might be exposed and it causes subsequent SPI flash probe fails). * + * @type: Type of MRC data to use * @devp: Returns pointer to the SPI flash device * @entry: Position and size of MRC cache in SPI flash * @return 0 if success, -ENOENT if SPI flash node does not exist in the @@ -91,7 +85,8 @@ int mrccache_reserve(void); * tree, -EINVAL if MRC region properties format is incorrect, other error * if SPI flash probe failed. */ -int mrccache_get_region(struct udevice **devp, struct mrc_region *entry); +int mrccache_get_region(enum mrc_type_t type, struct udevice **devp, + struct mrc_region *entry); /** * mrccache_save() - save MRC data to the SPI flash |