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authorSimon Glass <sjg@chromium.org>2021-03-15 18:00:19 +1300
committerSimon Glass <sjg@chromium.org>2021-03-27 13:59:37 +1300
commit17753b0382ce9b291e48a4e23d68e6b1d62c5871 (patch)
tree38ff318df9891caf53af73e2cd85ed90775cf732 /arch/x86/include/asm/coreboot_tables.h
parente35b6497f417c60cdcaa521eb4cbd3b2bb2e8336 (diff)
x86: Move coreboot timestamp info into coreboot_tables.h
This all relates to the sysinfo structure provided by coreboot. Put the timestamp definitions into the same file as the others. Tidy up a few comments at the same time. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/include/asm/coreboot_tables.h')
-rw-r--r--arch/x86/include/asm/coreboot_tables.h38
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/x86/include/asm/coreboot_tables.h b/arch/x86/include/asm/coreboot_tables.h
index 7e1576768b..dec0c14ec7 100644
--- a/arch/x86/include/asm/coreboot_tables.h
+++ b/arch/x86/include/asm/coreboot_tables.h
@@ -8,6 +8,44 @@
#ifndef _COREBOOT_TABLES_H
#define _COREBOOT_TABLES_H
+struct timestamp_entry {
+ u32 entry_id;
+ u64 entry_stamp;
+} __packed;
+
+struct timestamp_table {
+ u64 base_time;
+ u16 max_entries;
+ u16 tick_freq_mhz;
+ u32 num_entries;
+ struct timestamp_entry entries[0]; /* Variable number of entries */
+} __packed;
+
+enum timestamp_id {
+ /* coreboot specific timestamp IDs */
+ TS_START_ROMSTAGE = 1,
+ TS_BEFORE_INITRAM = 2,
+ TS_AFTER_INITRAM = 3,
+ TS_END_ROMSTAGE = 4,
+ TS_START_COPYRAM = 8,
+ TS_END_COPYRAM = 9,
+ TS_START_RAMSTAGE = 10,
+ TS_DEVICE_ENUMERATE = 30,
+ TS_DEVICE_CONFIGURE = 40,
+ TS_DEVICE_ENABLE = 50,
+ TS_DEVICE_INITIALIZE = 60,
+ TS_DEVICE_DONE = 70,
+ TS_CBMEM_POST = 75,
+ TS_WRITE_TABLES = 80,
+ TS_LOAD_PAYLOAD = 90,
+ TS_ACPI_WAKE_JUMP = 98,
+ TS_SELFBOOT_JUMP = 99,
+
+ /* U-Boot entry IDs start at 1000 */
+ TS_U_BOOT_INITTED = 1000, /* This is where U-Boot starts */
+ TS_U_BOOT_START_KERNEL = 1100, /* Right before jumping to kernel */
+};
+
struct memory_area;
struct cbuint64 {