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| author | Tom Rini <trini@konsulko.com> | 2019-01-15 22:05:05 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2019-01-15 22:05:05 -0500 |
| commit | 0cd35f392000fb0783149d9b5f66c5f2e01bcbf1 (patch) | |
| tree | b2bc80bd79b2ba7aa387abc575630b03b7470c36 /arch/riscv/lib/interrupts.c | |
| parent | e807f6b5f9a164dc1fc35e1c733fa343acf335c0 (diff) | |
| parent | 91882c472d8c0aef4db699d3f2de55bf43d4ae4b (diff) | |
Merge git://git.denx.de/u-boot-riscv
1. Improve cache implementation.
2. Fix and improve standalone applications
Diffstat (limited to 'arch/riscv/lib/interrupts.c')
| -rw-r--r-- | arch/riscv/lib/interrupts.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/riscv/lib/interrupts.c b/arch/riscv/lib/interrupts.c index e185933b01..74c1e561c7 100644 --- a/arch/riscv/lib/interrupts.c +++ b/arch/riscv/lib/interrupts.c @@ -37,7 +37,8 @@ static void _exit_trap(ulong code, ulong epc, struct pt_regs *regs) printf("exception code: %ld , %s , epc %lx , ra %lx\n", code, exception_code[code], epc, regs->ra); } else { - printf("Reserved\n"); + printf("reserved exception code: %ld , epc %lx , ra %lx\n", + code, epc, regs->ra); } hang(); |