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| author | Tom Rini <trini@konsulko.com> | 2018-12-21 13:36:08 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-12-21 13:36:08 -0500 |
| commit | 328e3f8a706931e1a8f76adfdc015ad76cbeb83c (patch) | |
| tree | b88b5eb9c3135640bc44262229cc70f4a0e6acdc /arch/riscv/include/asm/syscon.h | |
| parent | 1f2e948d6d53f77a2ddb2dde3531b0d5bc2815ad (diff) | |
| parent | 368ff57805b03bebf99e97e703ce07aec721bc71 (diff) | |
Merge git://git.denx.de/u-boot-riscv
- Add DM drivers to support RISC-V CPU and timer, plus some bug fixes.
- Support SiFive UART
- Rename ax25-ae350 defconfig
Diffstat (limited to 'arch/riscv/include/asm/syscon.h')
| -rw-r--r-- | arch/riscv/include/asm/syscon.h | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/riscv/include/asm/syscon.h b/arch/riscv/include/asm/syscon.h new file mode 100644 index 0000000000..d311ee6b45 --- /dev/null +++ b/arch/riscv/include/asm/syscon.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com> + */ + +#ifndef _ASM_SYSCON_H +#define _ASM_SYSCON_H + +/* + * System controllers in a RISC-V system + * + * So far only SiFive's Core Local Interruptor (CLINT) is defined. + */ +enum { + RISCV_NONE, + RISCV_SYSCON_CLINT, /* Core Local Interruptor (CLINT) */ +}; + +#endif /* _ASM_SYSCON_H */ |