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| author | Tom Rini <trini@konsulko.com> | 2023-08-10 10:36:43 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2023-08-10 10:36:43 -0400 |
| commit | 824f1044227d5e971d5541d8f334bc2dfa22b99f (patch) | |
| tree | 40dcd7ccb9a4dd2a5421296e1e7bfc921c46315b /arch/riscv/cpu/start.S | |
| parent | ec58228830a1f68e8e65099387cf12c5a91c9e72 (diff) | |
| parent | 47ed15125cccd98e041cdff3b6bbe675a2418ec2 (diff) | |
Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
+ Add USB host support on VisionFive2 board
+ Enable SPI flash support on VisionFive2 board
+ Enable Random Number Generator in RISC-V QEMU board
+ Display new SBI extension
+ Add SPL_ZERO_MEM_BEFORE_USE Kconfig for jh7110 L2 LIM
(Loosely-Integrated Memory)
Diffstat (limited to 'arch/riscv/cpu/start.S')
| -rw-r--r-- | arch/riscv/cpu/start.S | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index 59d58a5a57..30cf674370 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -111,6 +111,18 @@ call_board_init_f: * It's essential before any function call, otherwise, we get data-race. */ +/* clear stack if necessary */ +#if CONFIG_IS_ENABLED(ZERO_MEM_BEFORE_USE) +clear_stack: + li t1, 1 + slli t1, t1, CONFIG_STACK_SIZE_SHIFT + sub t1, sp, t1 +clear_stack_loop: + SREG zero, 0(t1) /* t1 is always 16 byte aligned */ + addi t1, t1, REGBYTES + blt t1, sp, clear_stack_loop +#endif + call_board_init_f_0: /* find top of reserve space */ #if CONFIG_IS_ENABLED(SMP) |