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| author | Tom Rini <trini@konsulko.com> | 2019-05-09 07:11:52 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2019-05-09 07:11:52 -0400 |
| commit | 7d41f2dcbe5b25c0099d74a610cc586b940c50ab (patch) | |
| tree | 4284df3fa3784336f1bdd59f81daee26129dd89c /arch/riscv/cpu/start.S | |
| parent | 7aaf2af0e07f9923976372ff7a3ce7a0f8004723 (diff) | |
| parent | 3cedc97479ff44cdc00485de7517a833e3dfb630 (diff) | |
Merge git://git.denx.de/u-boot-riscv
- Correct SYS_TEXT_BASE for qemu.
- Support booti.
- Increase SYSBOOTM_LEN for Fedora/RISCV kernel.
- Support SMP booting from flash.
Diffstat (limited to 'arch/riscv/cpu/start.S')
| -rw-r--r-- | arch/riscv/cpu/start.S | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index a4433fbd6b..60ac8c621e 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -98,6 +98,7 @@ call_board_init_f_0: mv sp, a0 #endif +#ifndef CONFIG_XIP /* * Pick hart to initialize global data and run U-Boot. The other harts * wait for initialization to complete. @@ -106,15 +107,21 @@ call_board_init_f_0: li s2, 1 amoswap.w s2, t1, 0(t0) bnez s2, wait_for_gd_init +#else + bnez tp, secondary_hart_loop +#endif +#ifdef CONFIG_OF_PRIOR_STAGE la t0, prior_stage_fdt_address SREG s1, 0(t0) +#endif jal board_init_f_init_reserve /* save the boot hart id to global_data */ SREG tp, GD_BOOT_HART(gp) +#ifndef CONFIG_XIP la t0, available_harts_lock fence rw, w amoswap.w zero, zero, 0(t0) @@ -141,6 +148,7 @@ wait_for_gd_init: * secondary_hart_loop. */ bnez s2, secondary_hart_loop +#endif /* Enable cache */ jal icache_enable |