diff options
| author | Tom Rini <trini@konsulko.com> | 2022-12-04 10:03:56 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-12-23 10:09:42 -0500 |
| commit | 452e33efa8c98c5fa3bb11d1a8b66966df253cdc (patch) | |
| tree | 3e293b432fcdc0b4c2adab821e4242677ab1ba1b /arch/powerpc/cpu/mpc85xx | |
| parent | c20d7cc95c512c7a57720c1481619db7baa4a263 (diff) | |
global: Migrate CONFIG_FM_PLAT_CLK_DIV to CFG
Perform a simple rename of CONFIG_FM_PLAT_CLK_DIV to CFG_FM_PLAT_CLK_DIV
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx')
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/speed.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index a6e352ceab..eec071022e 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -67,7 +67,7 @@ void get_sys_info(sys_info_t *sys_info) [14] = 4, /* CC4 PPL / 4 */ }; uint i, freq_c_pll[CONFIG_SYS_FSL_NUM_CC_PLLS]; -#if !defined(CONFIG_FM_PLAT_CLK_DIV) || !defined(CONFIG_PME_PLAT_CLK_DIV) +#if !defined(CFG_FM_PLAT_CLK_DIV) || !defined(CONFIG_PME_PLAT_CLK_DIV) uint rcw_tmp; #endif uint ratio[CONFIG_SYS_FSL_NUM_CC_PLLS]; @@ -206,7 +206,7 @@ void get_sys_info(sys_info_t *sys_info) #define FM1_CLK_SEL 0x1c000000 #define FM1_CLK_SHIFT 26 #endif -#if !defined(CONFIG_FM_PLAT_CLK_DIV) || !defined(CONFIG_PME_PLAT_CLK_DIV) +#if !defined(CFG_FM_PLAT_CLK_DIV) || !defined(CONFIG_PME_PLAT_CLK_DIV) #if defined(CONFIG_ARCH_T1024) rcw_tmp = in_be32(&gur->rcwsr[15]) - 4; #else @@ -377,7 +377,7 @@ void get_sys_info(sys_info_t *sys_info) #endif #ifdef CONFIG_SYS_DPAA_FMAN -#ifndef CONFIG_FM_PLAT_CLK_DIV +#ifndef CFG_FM_PLAT_CLK_DIV switch ((rcw_tmp & FM1_CLK_SEL) >> FM1_CLK_SHIFT) { case 1: sys_info->freq_fman[0] = freq_c_pll[CFG_SYS_FM1_CLK]; |