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authorTom Rini <trini@konsulko.com>2017-03-14 11:08:12 -0400
committerTom Rini <trini@konsulko.com>2017-04-05 13:52:34 -0400
commit70cc0c34b638fbf99f0984dc53312cd8479c99a7 (patch)
treed0ef8822cc0f6e71c300795cb6be3260414d11bc /arch/openrisc/lib/timer.c
parent936478e797a87bcd4e002bf70430b6f58584b155 (diff)
OpenRISC: Remove
The OpenRISC architecture is currently unmaintained, remove. Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/openrisc/lib/timer.c')
-rw-r--r--arch/openrisc/lib/timer.c98
1 files changed, 0 insertions, 98 deletions
diff --git a/arch/openrisc/lib/timer.c b/arch/openrisc/lib/timer.c
deleted file mode 100644
index db8ddbdba5..0000000000
--- a/arch/openrisc/lib/timer.c
+++ /dev/null
@@ -1,98 +0,0 @@
-/*
- * (C) Copyright 2011, Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
- * (C) Copyright 2011, Julius Baxter <julius@opencores.org>
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/system.h>
-#include <asm/openrisc_exc.h>
-
-static ulong timestamp;
-
-/* how many counter cycles in a jiffy */
-#define TIMER_COUNTER_CYCLES (CONFIG_SYS_CLK_FREQ/CONFIG_SYS_OPENRISC_TMR_HZ)
-/* how many ms elapses between each timer interrupt */
-#define TIMER_TIMESTAMP_INC (1000/CONFIG_SYS_OPENRISC_TMR_HZ)
-/* how many cycles per ms */
-#define TIMER_CYCLES_MS (CONFIG_SYS_CLK_FREQ/1000)
-/* how many cycles per us */
-#define TIMER_CYCLES_US (CONFIG_SYS_CLK_FREQ/1000000uL)
-
-void timer_isr(void)
-{
- timestamp += TIMER_TIMESTAMP_INC;
- mtspr(SPR_TTMR, SPR_TTMR_IE | SPR_TTMR_RT |
- (TIMER_COUNTER_CYCLES & SPR_TTMR_TP));
-}
-
-int timer_init(void)
-{
- /* Install timer exception handler */
- exception_install_handler(EXC_TIMER, timer_isr);
-
- /* Set up the timer for the first expiration. */
- timestamp = 0;
-
- mtspr(SPR_TTMR, SPR_TTMR_IE | SPR_TTMR_RT |
- (TIMER_COUNTER_CYCLES & SPR_TTMR_TP));
-
- /* Enable tick timer exception in supervisor register */
- mtspr(SPR_SR, mfspr(SPR_SR) | SPR_SR_TEE);
-
- return 0;
-}
-
-void reset_timer(void)
-{
- timestamp = 0;
-
- mtspr(SPR_TTMR, SPR_TTMR_IE | SPR_TTMR_RT |
- (TIMER_COUNTER_CYCLES & SPR_TTMR_TP));
-}
-
-/*
- * The timer value in ms is calculated by taking the
- * value accumulated by full timer revolutions plus the value
- * accumulated in this period
- */
-ulong get_timer(ulong base)
-{
- return timestamp + mfspr(SPR_TTCR)/TIMER_CYCLES_MS - base;
-}
-
-void set_timer(ulong t)
-{
- reset_timer();
- timestamp = t;
-}
-
-unsigned long long get_ticks(void)
-{
- return get_timer(0);
-}
-
-ulong get_tbclk(void)
-{
- return CONFIG_SYS_HZ;
-}
-
-void __udelay(ulong usec)
-{
- ulong elapsed = 0;
- ulong tick;
- ulong last_tick;
-
- last_tick = mfspr(SPR_TTCR);
- while ((elapsed / TIMER_CYCLES_US) < usec) {
- tick = mfspr(SPR_TTCR);
- if (tick >= last_tick)
- elapsed += (tick - last_tick);
- else
- elapsed += TIMER_COUNTER_CYCLES - (last_tick - tick);
- last_tick = tick;
- }
-}