diff options
| author | Tom Rini <trini@konsulko.com> | 2023-03-27 15:19:57 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2023-03-27 15:19:57 -0400 |
| commit | 605bc145f91d2a28ba2e517cae4e53e255e34b6f (patch) | |
| tree | a8df36d6569d441bc013399ff7dafff07cd36657 /arch/m68k/cpu/mcf52x2/interrupts.c | |
| parent | fde439219ff53a46bdd5dff69e049ccd4be57310 (diff) | |
| parent | 41a88ad529b3943b1e465846eb24fe2c29203e35 (diff) | |
Merge branch 'master' into next
Diffstat (limited to 'arch/m68k/cpu/mcf52x2/interrupts.c')
| -rw-r--r-- | arch/m68k/cpu/mcf52x2/interrupts.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/m68k/cpu/mcf52x2/interrupts.c b/arch/m68k/cpu/mcf52x2/interrupts.c index e8a1e132d2..e787c7605f 100644 --- a/arch/m68k/cpu/mcf52x2/interrupts.c +++ b/arch/m68k/cpu/mcf52x2/interrupts.c @@ -34,7 +34,7 @@ int interrupt_init(void) return 0; } -#if defined(CONFIG_MCFTMR) +#if defined(CFG_MCFTMR) void dtimer_intr_setup(void) { intctrl_t *intp = (intctrl_t *) (CFG_SYS_INTR_BASE); @@ -42,7 +42,7 @@ void dtimer_intr_setup(void) clrbits_be32(&intp->int_icr1, INT_ICR1_TMR3MASK); setbits_be32(&intp->int_icr1, CFG_SYS_TMRINTR_PRI); } -#endif /* CONFIG_MCFTMR */ +#endif /* CFG_MCFTMR */ #endif /* CONFIG_M5272 */ #if defined(CONFIG_M5208) || defined(CONFIG_M5282) || \ @@ -63,7 +63,7 @@ int interrupt_init(void) return 0; } -#if defined(CONFIG_MCFTMR) +#if defined(CFG_MCFTMR) void dtimer_intr_setup(void) { int0_t *intp = (int0_t *) (CFG_SYS_INTR_BASE); @@ -72,7 +72,7 @@ void dtimer_intr_setup(void) clrbits_be32(&intp->imrl0, 0x00000001); clrbits_be32(&intp->imrl0, CFG_SYS_TMRINTR_MASK); } -#endif /* CONFIG_MCFTMR */ +#endif /* CFG_MCFTMR */ #endif /* CONFIG_M5282 | CONFIG_M5271 | CONFIG_M5275 */ #if defined(CONFIG_M5249) || defined(CONFIG_M5253) @@ -83,11 +83,11 @@ int interrupt_init(void) return 0; } -#if defined(CONFIG_MCFTMR) +#if defined(CFG_MCFTMR) void dtimer_intr_setup(void) { mbar_writeLong(MCFSIM_IMR, mbar_readLong(MCFSIM_IMR) & ~0x00000400); mbar_writeByte(MCFSIM_TIMER2ICR, CFG_SYS_TMRINTR_PRI); } -#endif /* CONFIG_MCFTMR */ +#endif /* CFG_MCFTMR */ #endif /* CONFIG_M5249 || CONFIG_M5253 */ |