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| author | Tom Rini <trini@konsulko.com> | 2018-04-09 11:06:21 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-04-09 11:06:21 -0400 |
| commit | 2600df4f8ef12ece9cec13030005919e0ba2b0d5 (patch) | |
| tree | 993f32ce9c39fadc2effffb3690dc60cd1add303 /arch/arm/mach-zynq/clk.c | |
| parent | 844fb498cc978608ec88bdf29913c0d46c85bfff (diff) | |
| parent | f190eaf002bf1434587d57c726b3dabfabbc8074 (diff) | |
Merge tag 'xilinx-for-v2018.05-rc2' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.05-rc2
- Various DT changes and sync with mainline kernel
- Various defconfig updates
- Add SPL init for zcu102 revA
- Add new zynqmp boards zcu100/zcu104/zcu106/zcu111/zc12XX
and zc1751-dc3
- Net fixes - xlnx,phy-type
- 64bit axi ethernet support
- arasan: Fix nand write issue
- fpga fixes
- Maintainer file updates
Diffstat (limited to 'arch/arm/mach-zynq/clk.c')
| -rw-r--r-- | arch/arm/mach-zynq/clk.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mach-zynq/clk.c b/arch/arm/mach-zynq/clk.c index 1369cd095b..3c27038630 100644 --- a/arch/arm/mach-zynq/clk.c +++ b/arch/arm/mach-zynq/clk.c @@ -94,7 +94,8 @@ int soc_clk_dump(void) clk_free(&clk); - if (rate == (unsigned long)-ENOSYS) + if ((rate == (unsigned long)-ENOSYS) || + (rate == (unsigned long)-ENXIO)) printf("%10s%20s\n", name, "unknown"); else printf("%10s%20lu\n", name, rate); |