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authorAshok Reddy Soma <ashok.reddy.soma@amd.com>2023-05-16 08:47:53 -0600
committerMichal Simek <michal.simek@amd.com>2023-06-12 13:24:31 +0200
commitded539ff6633f3ba493e18bf23ce489bfc03f28d (patch)
tree6bdd9dc90a89fc7074e9a20c618889dfdb762ec0 /arch/arm/mach-versal-net/include/mach/hardware.h
parentaddd47379df54a3eb247c6db4f799f14af43e523 (diff)
arm64: versal-net: Detect and display bootmode
Read boodmode register using versal_net_get_bootmode() in board_late_init and prepare corresponding distro boot command sequence based on it. versal_net_get_bootmode() will be changed to use smc calls later, but for now directly reads the register. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230516144753.30869-1-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
Diffstat (limited to 'arch/arm/mach-versal-net/include/mach/hardware.h')
-rw-r--r--arch/arm/mach-versal-net/include/mach/hardware.h21
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/mach-versal-net/include/mach/hardware.h b/arch/arm/mach-versal-net/include/mach/hardware.h
index c5e4e22040..89b84a2efc 100644
--- a/arch/arm/mach-versal-net/include/mach/hardware.h
+++ b/arch/arm/mach-versal-net/include/mach/hardware.h
@@ -27,7 +27,13 @@ struct iou_scntrs_regs {
u32 base_frequency_id_register; /* 0x20 */
};
+struct crp_regs {
+ u32 reserved0[128];
+ u32 boot_mode_usr; /* 0x200 */
+};
+
#define VERSAL_NET_CRL_APB_BASEADDR 0xEB5E0000
+#define VERSAL_NET_CRP_BASEADDR 0xF1260000
#define VERSAL_NET_IOU_SCNTR_SECURE 0xEC920000
#define CRL_APB_TIMESTAMP_REF_CTRL_CLKACT_BIT BIT(25)
@@ -36,6 +42,7 @@ struct iou_scntrs_regs {
#define IOU_SCNTRS_CONTROL_EN 1
#define crlapb_base ((struct crlapb_regs *)VERSAL_NET_CRL_APB_BASEADDR)
+#define crp_base ((struct crp_regs *)VERSAL_NET_CRP_BASEADDR)
#define iou_scntr_secure ((struct iou_scntrs_regs *)VERSAL_NET_IOU_SCNTR_SECURE)
#define PMC_TAP 0xF11A0000
@@ -49,6 +56,20 @@ struct iou_scntrs_regs {
# define PLATFORM_VERSION_MASK GENMASK(31, 28)
#define PMC_TAP_USERCODE (PMC_TAP + 0x8)
+/* Bootmode setting values */
+#define BOOT_MODES_MASK 0x0000000F
+#define QSPI_MODE_24BIT 0x00000001
+#define QSPI_MODE_32BIT 0x00000002
+#define SD_MODE 0x00000003 /* sd 0 */
+#define SD_MODE1 0x00000005 /* sd 1 */
+#define EMMC_MODE 0x00000006
+#define USB_MODE 0x00000007
+#define OSPI_MODE 0x00000008
+#define SD1_LSHFT_MODE 0x0000000E /* SD1 Level shifter */
+#define JTAG_MODE 0x00000000
+#define BOOT_MODE_USE_ALT 0x100
+#define BOOT_MODE_ALT_SHIFT 12
+
enum versal_net_platform {
VERSAL_NET_SILICON = 0,
VERSAL_NET_SPP = 1,