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| author | Tom Rini <trini@konsulko.com> | 2017-05-17 14:13:58 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2017-05-17 14:13:58 -0400 |
| commit | fa8967cfbaed5582ba987756fa9f0470a9affbf4 (patch) | |
| tree | 258ab44757e1c78825f087310577f1df05ccdcca /arch/arm/mach-uniphier/boot-device/boot-device-pxs3.c | |
| parent | ae1b939930b0fffc062bb99196ec22e19afcc7e8 (diff) | |
| parent | 81afa9c9a3a9c006a6555e4abf7a75875eb3e926 (diff) | |
Merge git://git.denx.de/u-boot-uniphier
- Add workaround code to make LD20 SoC boot from ARM Trusted Firmware
- Sync DT with Linux to fix DTC warnings
- Add new SoC support code
- Misc fix, updates
Diffstat (limited to 'arch/arm/mach-uniphier/boot-device/boot-device-pxs3.c')
| -rw-r--r-- | arch/arm/mach-uniphier/boot-device/boot-device-pxs3.c | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/arch/arm/mach-uniphier/boot-device/boot-device-pxs3.c b/arch/arm/mach-uniphier/boot-device/boot-device-pxs3.c new file mode 100644 index 0000000000..fe45a01cc2 --- /dev/null +++ b/arch/arm/mach-uniphier/boot-device/boot-device-pxs3.c @@ -0,0 +1,41 @@ +/* + * Copyright (C) 2017 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <spl.h> +#include <linux/io.h> +#include <linux/kernel.h> + +#include "../sg-regs.h" +#include "boot-device.h" + +const struct uniphier_boot_device uniphier_pxs3_boot_device_table[] = { + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"}, + {BOOT_DEVICE_MMC1, "eMMC (Legacy, 4bit, 1.8V, Training Off)"}, + {BOOT_DEVICE_MMC1, "eMMC (Legacy, 4bit, 1.8V, Training On)"}, + {BOOT_DEVICE_MMC1, "eMMC (Legacy, 8bit, 1.8V, Training Off)"}, + {BOOT_DEVICE_MMC1, "eMMC (Legacy, 8bit, 1.8V, Training On)"}, + {BOOT_DEVICE_MMC1, "eMMC (High Speed SDR, 8bit, 1.8V, Training Off)"}, + {BOOT_DEVICE_MMC1, "eMMC (High Speed SDR, 8bit, 1.8V, Training On)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5, BBM Last Page)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5, BBM Last Page)"}, +}; + +const unsigned uniphier_pxs3_boot_device_count = + ARRAY_SIZE(uniphier_pxs3_boot_device_table); + +int uniphier_pxs3_boot_device_is_usb(u32 pinmon) +{ + return !!(readl(SG_PINMON2) & BIT(31)); +} |