arm: uniphier: use DM_TIMER of arm a9 global timer

All uniphier v7 SoCs have cortex-a9 and use cortex-a9 global timer
in a simple implementation. Now DM_TIMER of it is available
on 35751c7f3f ("timer: sti: convert sti-timer to arm a9 global timer"),
so let's switch to it.

The old driver reads the lower 32bits of counter field
and sets the prescaler as 50 with PERIPHCLK(=50MHz),
so the global timer works as a 32-bit 1MHz timer.

The DM_TIMER uses the whole 64bits with no prescaler,
so the global timer works as a 64-bit PERIPHCLK timer.

CONFIG_SYS_HZ_CLOCK is set as the default PERIPHCLK frequency,
if there is no 'clocks' property in devicetree.

Signed-off-by: Dai Okamura <okamura.dai@socionext.com>

1 files changed, 0 insertions, 39 deletions

diff --git a/arch/arm/mach-uniphier/arm32/timer.c b/arch/arm/mach-uniphier/arm32/timer.c
deleted file mode 100644
index 58247c2738..0000000000
--- a/arch/arm/mach-uniphier/arm32/timer.c
+++ /dev/null
@@ -1,39 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
- */
-
-#include <config.h>
-#include <init.h>
-#include <linux/io.h>
-
-#include "arm-mpcore.h"
-
-#define PERIPHCLK (50 * 1000 * 1000) /* 50 MHz */
-#define PRESCALER ((PERIPHCLK) / (CFG_SYS_TIMER_RATE) - 1)
-
-static void *get_global_timer_base(void)
-{
-	void *val;
-
-	asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (val) : : "memory");
-
-	return val + GLOBAL_TIMER_OFFSET;
-}
-
-unsigned long timer_read_counter(void)
-{
-	/*
-	 * ARM 64bit Global Timer is too much for our purpose.
-	 * We use only lower 32 bit of the timer counter.
-	 */
-	return readl(get_global_timer_base() + GTIMER_CNT_L);
-}
-
-int timer_init(void)
-{
-	/* enable timer */
-	writel(PRESCALER << 8 | 1, get_global_timer_base() + GTIMER_CTRL);
-
-	return 0;
-}