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authorTom Rini <trini@konsulko.com>2020-07-07 14:00:44 -0400
committerTom Rini <trini@konsulko.com>2020-07-07 14:00:44 -0400
commit1e88e78177da80fa8e9fa9fc7613657478d61d1e (patch)
tree9b713c7aab282891762ed8cdd6c1fffa195bd1ac /arch/arm/mach-stm32mp/bsec.c
parentc4df37bfa916d6516d67dde6ef9d1b18b36041d3 (diff)
parent6c393e8c0fae98a3a6e2909fc79697075552a152 (diff)
Merge tag 'u-boot-stm32-20200707' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- arch and board update for stm32mp15: - use OPP information in device tree for 800MHz/650MHz support - ram: inprovments of test command - solve boot on closed chip when access to DBGMCU_IDC is protected - stm32prog command: Add "device anme" during USB enumeration - update configs: activate WATCHDOG and 'env erase' command, increase teed partition, support SD card after NOR boot by default and use env info in env_check - some sboard cleanups: gpio hog in dh board, specific driver for type-c stusb1600 controller code in a driver move part of code in spl.c and in common directory - fix STM32 compatible for dwc_eth_qos driver - support of new pinctrl ops get_dir_flags/set_dir_flags in stm32 and stmfx drivers - vrefbuf: fix a possible overshoot when re-enabling
Diffstat (limited to 'arch/arm/mach-stm32mp/bsec.c')
-rw-r--r--arch/arm/mach-stm32mp/bsec.c36
1 files changed, 31 insertions, 5 deletions
diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c
index fc39230113..0c56b440f5 100644
--- a/arch/arm/mach-stm32mp/bsec.c
+++ b/arch/arm/mach-stm32mp/bsec.c
@@ -8,6 +8,7 @@
#include <log.h>
#include <misc.h>
#include <asm/io.h>
+#include <asm/arch/bsec.h>
#include <asm/arch/stm32mp1_smc.h>
#include <linux/arm-smccc.h>
#include <linux/iopoll.h>
@@ -21,6 +22,7 @@
#define BSEC_OTP_WRDATA_OFF 0x008
#define BSEC_OTP_STATUS_OFF 0x00C
#define BSEC_OTP_LOCK_OFF 0x010
+#define BSEC_DENABLE_OFF 0x014
#define BSEC_DISTURBED_OFF 0x01C
#define BSEC_ERROR_OFF 0x034
#define BSEC_WRLOCK_OFF 0x04C /* OTP write permananet lock */
@@ -46,6 +48,9 @@
#define BSEC_MODE_PROGFAIL_MASK 0x10
#define BSEC_MODE_PWR_MASK 0x20
+/* DENABLE Register */
+#define BSEC_DENABLE_DBGSWENABLE BIT(10)
+
/*
* OTP Lock services definition
* Value must corresponding to the bit number in the register
@@ -474,20 +479,23 @@ static int stm32mp_bsec_ofdata_to_platdata(struct udevice *dev)
return 0;
}
-#ifndef CONFIG_TFABOOT
static int stm32mp_bsec_probe(struct udevice *dev)
{
+#if !defined(CONFIG_TFABOOT) && !defined(CONFIG_SPL_BUILD)
int otp;
struct stm32mp_bsec_platdata *plat = dev_get_platdata(dev);
- /* update unlocked shadow for OTP cleared by the rom code */
+ /*
+ * update unlocked shadow for OTP cleared by the rom code
+ * only executed in U-Boot proper when TF-A is not used
+ */
for (otp = 57; otp <= BSEC_OTP_MAX_VALUE; otp++)
if (!bsec_read_SR_lock(plat->base, otp))
bsec_shadow_register(plat->base, otp);
+#endif
return 0;
}
-#endif
static const struct udevice_id stm32mp_bsec_ids[] = {
{ .compatible = "st,stm32mp15-bsec" },
@@ -501,7 +509,25 @@ U_BOOT_DRIVER(stm32mp_bsec) = {
.ofdata_to_platdata = stm32mp_bsec_ofdata_to_platdata,
.platdata_auto_alloc_size = sizeof(struct stm32mp_bsec_platdata),
.ops = &stm32mp_bsec_ops,
-#ifndef CONFIG_TFABOOT
.probe = stm32mp_bsec_probe,
-#endif
};
+
+bool bsec_dbgswenable(void)
+{
+ struct udevice *dev;
+ struct stm32mp_bsec_platdata *plat;
+ int ret;
+
+ ret = uclass_get_device_by_driver(UCLASS_MISC,
+ DM_GET_DRIVER(stm32mp_bsec), &dev);
+ if (ret || !dev) {
+ pr_debug("bsec driver not available\n");
+ return false;
+ }
+
+ plat = dev_get_platdata(dev);
+ if (readl(plat->base + BSEC_DENABLE_OFF) & BSEC_DENABLE_DBGSWENABLE)
+ return true;
+
+ return false;
+}