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authorTom Rini <trini@konsulko.com>2018-12-21 13:37:34 -0500
committerTom Rini <trini@konsulko.com>2018-12-21 13:37:34 -0500
commit5c676780e116dc79c1819d6c49a2aa53e1053e04 (patch)
treef3520ab8006d50442d48da215993c1ec4711f10a /arch/arm/mach-socfpga/misc_gen5.c
parentb7702158fb0ab3a1d2f81efefb47133e245c2a44 (diff)
parentbd5581716d0407272cfde624b484e530665b0a2f (diff)
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
- stratix10 updates
Diffstat (limited to 'arch/arm/mach-socfpga/misc_gen5.c')
-rw-r--r--arch/arm/mach-socfpga/misc_gen5.c22
1 files changed, 21 insertions, 1 deletions
diff --git a/arch/arm/mach-socfpga/misc_gen5.c b/arch/arm/mach-socfpga/misc_gen5.c
index 5fa40937c4..04f237d100 100644
--- a/arch/arm/mach-socfpga/misc_gen5.c
+++ b/arch/arm/mach-socfpga/misc_gen5.c
@@ -35,6 +35,26 @@ static struct scu_registers *scu_regs =
(struct scu_registers *)SOCFPGA_MPUSCU_ADDRESS;
/*
+ * FPGA programming support for SoC FPGA Cyclone V
+ */
+static Altera_desc altera_fpga[] = {
+ {
+ /* Family */
+ Altera_SoCFPGA,
+ /* Interface type */
+ fast_passive_parallel,
+ /* No limitation as additional data will be ignored */
+ -1,
+ /* No device function table */
+ NULL,
+ /* Base interface address specified in driver */
+ NULL,
+ /* No cookie implementation */
+ 0
+ },
+};
+
+/*
* DesignWare Ethernet initialization
*/
#ifdef CONFIG_ETH_DESIGNWARE
@@ -221,7 +241,7 @@ int arch_early_init_r(void)
socfpga_sdram_remap_zero();
/* Add device descriptor to FPGA device table */
- socfpga_fpga_add();
+ socfpga_fpga_add(&altera_fpga[0]);
#ifdef CONFIG_DESIGNWARE_SPI
/* Get Designware SPI controller out of reset */