diff options
| author | Tom Rini <trini@konsulko.com> | 2018-07-13 09:05:05 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-07-13 14:47:04 -0400 |
| commit | 914bb7ea2f9373fa59285ff77a95df73848c8f66 (patch) | |
| tree | f27ecab47f71990f91fbe0daad932ab0c5fce726 /arch/arm/mach-socfpga/misc.c | |
| parent | f2df46e5d9388987c2084a39f05f2ad32801b3b0 (diff) | |
| parent | aa529663368e97663d7ec16d6997cb69a2dd8afb (diff) | |
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
- Update SPDX tag in arch/arm/mach-socfpga/spl_a10.c
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm/mach-socfpga/misc.c')
| -rw-r--r-- | arch/arm/mach-socfpga/misc.c | 35 |
1 files changed, 34 insertions, 1 deletions
diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c index fca86507f1..77628e1181 100644 --- a/arch/arm/mach-socfpga/misc.c +++ b/arch/arm/mach-socfpga/misc.c @@ -40,7 +40,9 @@ struct bsel bsel_str[] = { int dram_init(void) { - gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); + if (fdtdec_setup_memory_size() != 0) + return -EINVAL; + return 0; } @@ -204,3 +206,34 @@ int socfpga_eth_reset_common(void (*resetfn)(const u8 of_reset_id, return 0; } #endif + +#ifndef CONFIG_SPL_BUILD +static int do_bridge(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + if (argc != 2) + return CMD_RET_USAGE; + + argv++; + + switch (*argv[0]) { + case 'e': /* Enable */ + do_bridge_reset(1); + break; + case 'd': /* Disable */ + do_bridge_reset(0); + break; + default: + return CMD_RET_USAGE; + } + + return 0; +} + +U_BOOT_CMD(bridge, 2, 1, do_bridge, + "SoCFPGA HPS FPGA bridge control", + "enable - Enable HPS-to-FPGA, FPGA-to-HPS, LWHPS-to-FPGA bridges\n" + "bridge disable - Enable HPS-to-FPGA, FPGA-to-HPS, LWHPS-to-FPGA bridges\n" + "" +); + +#endif |