diff options
| author | Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> | 2019-01-13 19:58:42 +0100 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2019-02-18 13:00:53 +0100 |
| commit | 473f55676a65e068ba82096f54cd1e9f16ecc006 (patch) | |
| tree | 3aebb98046794930da292ce46f88ae9885349fa0 /arch/arm/mach-socfpga/include | |
| parent | 6fb1eb1b7642d0d4dc984bc087939fb40142754c (diff) | |
arm: socfpga: gen5: remove hacked ETH RST handling
The 'dwmac_socfpga' ETH driver can now get the MACs out of reset
via the socfpga reset driver and can set PHY mode via syscon.
This means we can now remove the ad-hoc code to do this from
arch/arm/mach-socfpga.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Diffstat (limited to 'arch/arm/mach-socfpga/include')
| -rw-r--r-- | arch/arm/mach-socfpga/include/mach/reset_manager.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager.h b/arch/arm/mach-socfpga/include/mach/reset_manager.h index d9e0b33c60..42beaecdd6 100644 --- a/arch/arm/mach-socfpga/include/mach/reset_manager.h +++ b/arch/arm/mach-socfpga/include/mach/reset_manager.h @@ -10,8 +10,6 @@ void reset_cpu(ulong addr); void socfpga_per_reset(u32 reset, int set); void socfpga_per_reset_all(void); -int socfpga_eth_reset_common(void (*resetfn)(const u8 of_reset_id, - const u8 phymode)); #define RSTMGR_CTRL_SWWARMRSTREQ_LSB 1 |