diff options
| author | Marek Vasut <marex@denx.de> | 2018-08-18 19:11:52 +0200 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2018-08-24 12:05:20 +0200 |
| commit | 0b8f6378cbf20e56f49a52a584c1374f11020cbf (patch) | |
| tree | f17a402c5004f8ca4c8a50b642d0b52b79a07c3d /arch/arm/mach-socfpga/include | |
| parent | 8497cb9b25302e75a4422502c9d13d310ffbcfd2 (diff) | |
ARM: socfpga: Reorder Arria10 SPL
The Arria10 SPL is a complete mess of calls to functions which are
called in the wrong context and it is surprise it works at all. This
patch tries to clean that mess up by shuffling the function calls
around and moving the calls into the correct context. Due to the
delicate nature of the reordering, this is done in one huge patch.
The following changes happen in this patch:
- Security policy init and NIC301 happens first in board_init_f()
- The clock init happens very early in board_init_f() in SPL only
- arch_early_init_r() only registers the FPGA, just like on Gen5
- arch_early_init_r() is never called from any _f() function
- Dedicated FPGA pins are inited in board_init_f() as on Gen5
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'arch/arm/mach-socfpga/include')
| -rw-r--r-- | arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h | 3 | ||||
| -rw-r--r-- | arch/arm/mach-socfpga/include/mach/misc.h | 5 |
2 files changed, 7 insertions, 1 deletions
diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h b/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h index b3c8853aa3..de8c22540f 100644 --- a/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h +++ b/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h @@ -89,8 +89,9 @@ struct socfpga_clock_manager { struct socfpga_clock_manager_altera altera; }; -void cm_use_intosc(void); +#ifdef CONFIG_SPL_BUILD int cm_basic_init(const void *blob); +#endif unsigned int cm_get_l4_sp_clk_hz(void); unsigned long cm_get_mpu_clk_hz(void); diff --git a/arch/arm/mach-socfpga/include/mach/misc.h b/arch/arm/mach-socfpga/include/mach/misc.h index e7e08b72d2..4fc9570a04 100644 --- a/arch/arm/mach-socfpga/include/mach/misc.h +++ b/arch/arm/mach-socfpga/include/mach/misc.h @@ -25,6 +25,11 @@ static inline void socfpga_fpga_add(void) {} void socfpga_sdram_remap_zero(void); #endif +#ifdef CONFIG_TARGET_SOCFPGA_ARRIA10 +void socfpga_init_security_policies(void); +void socfpga_sdram_remap_zero(void); +#endif + void do_bridge_reset(int enable); #endif /* _MISC_H_ */ |