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authorTom Rini <trini@konsulko.com>2020-10-12 07:55:17 -0400
committerTom Rini <trini@konsulko.com>2020-10-12 07:55:17 -0400
commit9885313b9add6c04cf3059958c5ee51a4f0ac930 (patch)
tree521f4068c38677a996fe4d9b61d842426af6cfb4 /arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
parent47e9c70421d75336336097c1425028b40e4f0b54 (diff)
parent505dc1c6795ba0b80abf344bb6464cdc20774f44 (diff)
Merge branch 'for-next' of https://github.com/lftan/u-boot
Diffstat (limited to 'arch/arm/mach-socfpga/include/mach/system_manager_soc64.h')
-rw-r--r--arch/arm/mach-socfpga/include/mach/system_manager_soc64.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h b/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
index 5e3f54a6a8..4949cae97a 100644
--- a/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
+++ b/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
@@ -46,13 +46,21 @@ void sysmgr_pinmux_table_delay(const u32 **table, unsigned int *table_len);
#define SYSMGR_SOC64_GPO 0xe4
#define SYSMGR_SOC64_GPI 0xe8
#define SYSMGR_SOC64_MPU 0xf0
+/* store qspi ref clock */
#define SYSMGR_SOC64_BOOT_SCRATCH_COLD0 0x200
+/* store osc1 clock freq */
#define SYSMGR_SOC64_BOOT_SCRATCH_COLD1 0x204
+/* store fpga clock freq */
#define SYSMGR_SOC64_BOOT_SCRATCH_COLD2 0x208
+/* reserved for customer use */
#define SYSMGR_SOC64_BOOT_SCRATCH_COLD3 0x20c
+/* store PSCI_CPU_ON value */
#define SYSMGR_SOC64_BOOT_SCRATCH_COLD4 0x210
+/* store PSCI_CPU_ON value */
#define SYSMGR_SOC64_BOOT_SCRATCH_COLD5 0x214
+/* store VBAR_EL3 value */
#define SYSMGR_SOC64_BOOT_SCRATCH_COLD6 0x218
+/* store VBAR_EL3 value */
#define SYSMGR_SOC64_BOOT_SCRATCH_COLD7 0x21c
#define SYSMGR_SOC64_BOOT_SCRATCH_COLD8 0x220
#define SYSMGR_SOC64_BOOT_SCRATCH_COLD9 0x224