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| author | Tom Rini <trini@konsulko.com> | 2021-04-09 13:10:38 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-04-09 13:10:38 -0400 |
| commit | 92c4eb7ae3e8fe2c2b3c5b37f882b42282a08e84 (patch) | |
| tree | 2ce9a497994386b4f58861107a792fe69b82577e /arch/arm/mach-socfpga/clock_manager_agilex.c | |
| parent | a1e95e3805eacca1162f6049dceb9b1d2726cbf5 (diff) | |
| parent | 96fe4f6485e92ed9da464c96c5f536698c5ee66d (diff) | |
Merge branch 'v2021.07-rc1' of https://github.com/lftan/u-boot
Diffstat (limited to 'arch/arm/mach-socfpga/clock_manager_agilex.c')
| -rw-r--r-- | arch/arm/mach-socfpga/clock_manager_agilex.c | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/arch/arm/mach-socfpga/clock_manager_agilex.c b/arch/arm/mach-socfpga/clock_manager_agilex.c index 6377f2ce3b..e035c09aae 100644 --- a/arch/arm/mach-socfpga/clock_manager_agilex.c +++ b/arch/arm/mach-socfpga/clock_manager_agilex.c @@ -65,12 +65,6 @@ unsigned int cm_get_l4_sys_free_clk_hz(void) return cm_get_rate_dm(AGILEX_L4_SYS_FREE_CLK); } -u32 cm_get_qspi_controller_clk_hz(void) -{ - return readl(socfpga_get_sysmgr_addr() + - SYSMGR_SOC64_BOOT_SCRATCH_COLD0); -} - void cm_print_clock_quick_summary(void) { printf("MPU %10d kHz\n", |