diff options
| author | Siew Chin Lim <elly.siew.chin.lim@intel.com> | 2021-03-24 17:16:49 +0800 |
|---|---|---|
| committer | Ley Foon Tan <ley.foon.tan@intel.com> | 2021-04-08 17:29:12 +0800 |
| commit | 3aef59f28083e2e3bd0c7ad91230f573123ec848 (patch) | |
| tree | be9cc3fabccad1497aec0a7fefd612a298957475 /arch/arm/mach-socfpga/clock_manager_agilex.c | |
| parent | e2ffb1da1ddc442e4f48980e8524dd5b574012a2 (diff) | |
arm: socfpga: Move Stratix10 and Agilex clock manager common code
Move duplicated function cm_get_qspi_controller_clk_hz to clock_manager.c.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'arch/arm/mach-socfpga/clock_manager_agilex.c')
| -rw-r--r-- | arch/arm/mach-socfpga/clock_manager_agilex.c | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/arch/arm/mach-socfpga/clock_manager_agilex.c b/arch/arm/mach-socfpga/clock_manager_agilex.c index 6377f2ce3b..e035c09aae 100644 --- a/arch/arm/mach-socfpga/clock_manager_agilex.c +++ b/arch/arm/mach-socfpga/clock_manager_agilex.c @@ -65,12 +65,6 @@ unsigned int cm_get_l4_sys_free_clk_hz(void) return cm_get_rate_dm(AGILEX_L4_SYS_FREE_CLK); } -u32 cm_get_qspi_controller_clk_hz(void) -{ - return readl(socfpga_get_sysmgr_addr() + - SYSMGR_SOC64_BOOT_SCRATCH_COLD0); -} - void cm_print_clock_quick_summary(void) { printf("MPU %10d kHz\n", |