aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/mach-imx/imx8ulp/rdc.c
diff options
context:
space:
mode:
authorYe Li <ye.li@nxp.com>2023-01-31 16:42:20 +0800
committerStefano Babic <sbabic@denx.de>2023-03-29 20:15:42 +0200
commite01d1b1e302f77bdad6d1f0c7a17c4edee1e7ebd (patch)
treef40c7bf7d19ca329cedd7c1d57a269d42ee95b4c /arch/arm/mach-imx/imx8ulp/rdc.c
parentb36756c769ea22a9077dbba4b6410a7ddfc18016 (diff)
imx: imx8ulp: Reconfigure MRC3 for SRAM0 access
Some space in SRAM0 will be protected by S400 to allow RX SecPriv mode access only for boot purpose. Since SW will reuse the SRAM0 as SCMI buffer and SPL container loading buffer, need to reconfigure MRC3. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'arch/arm/mach-imx/imx8ulp/rdc.c')
-rw-r--r--arch/arm/mach-imx/imx8ulp/rdc.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/imx8ulp/rdc.c b/arch/arm/mach-imx/imx8ulp/rdc.c
index 86310ca0b8..8db96c1886 100644
--- a/arch/arm/mach-imx/imx8ulp/rdc.c
+++ b/arch/arm/mach-imx/imx8ulp/rdc.c
@@ -276,6 +276,21 @@ void xrdc_init_mda(void)
void xrdc_init_mrc(void)
{
+ /* Re-config MRC3 for SRAM0 in case protected by S400 */
+ xrdc_config_mrc_w0_w1(3, 0, 0x22010000, 0x10000);
+ xrdc_config_mrc_dx_perm(3, 0, 0, 1);
+ xrdc_config_mrc_dx_perm(3, 0, 1, 1);
+ xrdc_config_mrc_dx_perm(3, 0, 4, 1);
+ xrdc_config_mrc_dx_perm(3, 0, 5, 1);
+ xrdc_config_mrc_dx_perm(3, 0, 6, 1);
+ xrdc_config_mrc_dx_perm(3, 0, 7, 1);
+ xrdc_config_mrc_w3_w4(3, 0, 0x0, 0x80000FFF);
+
+ /* Clear other 3 regions of MRC3 to invalid */
+ xrdc_config_mrc_w3_w4(3, 1, 0x0, 0x0);
+ xrdc_config_mrc_w3_w4(3, 2, 0x0, 0x0);
+ xrdc_config_mrc_w3_w4(3, 3, 0x0, 0x0);
+
/* Set MRC4 and MRC5 for DDR access from A35 and AP NIC PER masters */
xrdc_config_mrc_w0_w1(4, 0, CFG_SYS_SDRAM_BASE, PHYS_SDRAM_SIZE);
xrdc_config_mrc_dx_perm(4, 0, 1, 1);