diff options
| author | Ye Li <ye.li@nxp.com> | 2023-01-31 16:42:15 +0800 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2023-03-29 20:15:42 +0200 |
| commit | 237ce9b6c4889ce6a493244d71c71fd99d38d034 (patch) | |
| tree | c801f64fa1cbd63aff0d9979622bc9a922a3ea59 /arch/arm/mach-imx/imx8ulp/rdc.c | |
| parent | bf9866d265fa1d727a675f40c036cd14408ad8d4 (diff) | |
imx: imx8ulp: Set XRDC MRC4/5 for access DDR from APD
iMX8ULP A1 S400 ROM removes the setting for MRC4/5. So we have to set
them in SPL to allow access to DDR from A35 and APD PER masters
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'arch/arm/mach-imx/imx8ulp/rdc.c')
| -rw-r--r-- | arch/arm/mach-imx/imx8ulp/rdc.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/imx8ulp/rdc.c b/arch/arm/mach-imx/imx8ulp/rdc.c index e24eeff8a2..c36c0ac743 100644 --- a/arch/arm/mach-imx/imx8ulp/rdc.c +++ b/arch/arm/mach-imx/imx8ulp/rdc.c @@ -276,6 +276,16 @@ void xrdc_init_mda(void) void xrdc_init_mrc(void) { + /* Set MRC4 and MRC5 for DDR access from A35 and AP NIC PER masters */ + xrdc_config_mrc_w0_w1(4, 0, CFG_SYS_SDRAM_BASE, PHYS_SDRAM_SIZE); + xrdc_config_mrc_dx_perm(4, 0, 1, 1); + xrdc_config_mrc_dx_perm(4, 0, 7, 1); + xrdc_config_mrc_w3_w4(4, 0, 0x0, 0x80000FFF); + + xrdc_config_mrc_w0_w1(5, 0, CFG_SYS_SDRAM_BASE, PHYS_SDRAM_SIZE); + xrdc_config_mrc_dx_perm(5, 0, 1, 1); + xrdc_config_mrc_w3_w4(5, 0, 0x0, 0x80000FFF); + /* The MRC8 is for SRAM1 */ xrdc_config_mrc_w0_w1(8, 0, 0x21000000, 0x10000); /* Allow for all domains: So domain 2/3 (HIFI DSP/LPAV) is ok to access */ |