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authorPeter Hoyes <Peter.Hoyes@arm.com>2021-08-19 16:53:10 +0100
committerTom Rini <trini@konsulko.com>2021-09-02 10:17:45 -0400
commit37a757e227ccfc7d9eef82ab38f8500a832ea01b (patch)
tree3d6b9d9d6d0eadf4148449ad067ba0cd5eaac183 /arch/arm/include/asm/macro.h
parent53b40e8d54fcdb834e10e6538084517524b8401b (diff)
armv8: Ensure EL1&0 VMSA is enabled
On Armv8-R, the EL1&0 memory system architecture is configurable as a VMSA or PMSA, and resets to an "architecturally unknown" value. Add code to armv8_switch_to_el1_m which detects whether the MSA at EL1&0 is configurable using the id_aa64mmfr0_el1 register MSA fields. If it is we must ensure the VMSA is enabled so that a rich OS can boot. The MSA and MSA_FRAC fields are described in the Armv8-R architecture profile supplement (section G1.3.7): https://developer.arm.com/documentation/ddi0600/latest/ Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Diffstat (limited to 'arch/arm/include/asm/macro.h')
-rw-r--r--arch/arm/include/asm/macro.h17
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/include/asm/macro.h b/arch/arm/include/asm/macro.h
index e1eefc283f..ecd8221c0d 100644
--- a/arch/arm/include/asm/macro.h
+++ b/arch/arm/include/asm/macro.h
@@ -316,6 +316,23 @@ lr .req x30
csel \tmp, \tmp2, \tmp, eq
msr hcr_el2, \tmp
+ /*
+ * Detect whether the system has a configurable memory system
+ * architecture at EL1&0
+ */
+ mrs \tmp, id_aa64mmfr0_el1
+ lsr \tmp, \tmp, #48
+ and \tmp, \tmp, #((ID_AA64MMFR0_EL1_MSA_MASK | \
+ ID_AA64MMFR0_EL1_MSA_FRAC_MASK) >> 48)
+ cmp \tmp, #((ID_AA64MMFR0_EL1_MSA_USE_FRAC | \
+ ID_AA64MMFR0_EL1_MSA_FRAC_VMSA) >> 48)
+ bne 2f
+
+ /* Ensure the EL1&0 VMSA is enabled */
+ mov \tmp, #(VTCR_EL2_MSA)
+ msr vtcr_el2, \tmp
+2:
+
/* Return to the EL1_SP1 mode from EL2 */
ldr \tmp, =(SPSR_EL_DEBUG_MASK | SPSR_EL_SERR_MASK |\
SPSR_EL_IRQ_MASK | SPSR_EL_FIQ_MASK |\