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author | Tom Rini <trini@konsulko.com> | 2022-12-05 08:33:19 -0500 |
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committer | Tom Rini <trini@konsulko.com> | 2022-12-05 08:33:19 -0500 |
commit | a50622d78c5c6babd1853ae913f339df54fe532c (patch) | |
tree | d9983965f00679f68b5a12cbc2dbc5dd64aafc4d /arch/arm/dts/zynq-cse-nor.dts | |
parent | bdaf047f51eda655f3d6bc9d076696f7733a57d8 (diff) | |
parent | 7ad3c09e7911e71c9a16a30aa052093a8f9b7e7c (diff) |
Merge tag 'xilinx-for-v2023.01-rc3-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2023.01-rc3-v2
xilinx:
- Fix MAC address selection for System Controller from FRU
- Cleanup Kconfig (ZYNQ_MAC_IN_EEPROM symbol)
versal:
- Create u-boot.elf for mini spi configurations
versal-net:
- Enable MT35XU flash
zynq:
- Add missing timer to DT for mini configurations
zynqmp:
- Do not include psu_init to U-Boot by default
- Do not enable IPI by default to mini U-Boot
- Update Luca's fragment
- Fix SPL_FS_LOAD_PAYLOAD_NAME usage
spi:
- gqspi: Fix tapdelay values
- gqspi: Fix 64bit address support
- cadence: Remove condition for calling enable linear mode
- nor-core: Invert logic to reflect sst26 flash unlocked
net:
- Add PCS/PMA phy support
Diffstat (limited to 'arch/arm/dts/zynq-cse-nor.dts')
-rw-r--r-- | arch/arm/dts/zynq-cse-nor.dts | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/dts/zynq-cse-nor.dts b/arch/arm/dts/zynq-cse-nor.dts index 197fbd717a..f22a149f79 100644 --- a/arch/arm/dts/zynq-cse-nor.dts +++ b/arch/arm/dts/zynq-cse-nor.dts @@ -85,6 +85,13 @@ #address-cells = <1>; #size-cells = <1>; }; + + scutimer: timer@f8f00600 { + u-boot,dm-pre-reloc; + compatible = "arm,cortex-a9-twd-timer"; + reg = <0xf8f00600 0x20>; + clock-frequency = <333333333>; + }; }; }; |