diff options
| author | Tom Rini <trini@konsulko.com> | 2022-10-24 21:28:47 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-10-24 21:28:47 -0400 |
| commit | 3eebbd866bfa8e889e52d1734b574a585e076a5a (patch) | |
| tree | 5ba4d5966dd2589cc21728c502f56549de1c7d57 /arch/arm/cpu/armv8 | |
| parent | 26bfb853cae5c05950f8716e6f405eb0f9588d97 (diff) | |
| parent | c4f0de3eecd951cd5480cdbc9d96c63a4432a521 (diff) | |
Merge tag 'fsl-qoriq-2022-10-18' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq
Layerscape update
- support sysreset,
- de-select FSL_IFC when booting from SD
- disable unused parts of ICID tables
- reduce ns_dev size for csu
- enable dma snooping for ls104x
- nand driver fixups for ls1043ardb rev 7.0 boards.
Diffstat (limited to 'arch/arm/cpu/armv8')
| -rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 4 | ||||
| -rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 2 | ||||
| -rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/icid.c | 2 | ||||
| -rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/soc.c | 2 |
4 files changed, 7 insertions, 3 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 8a7bbb4a65..ebca11d174 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -63,7 +63,7 @@ config ARCH_LS1043A bool select ARMV8_SET_SMPEN select ARM_ERRATA_855873 if !TFABOOT - select FSL_IFC if TFABOOT || (!QSPI_BOOT && !SD_BOOT_QSPI) + select FSL_IFC if TFABOOT || (!QSPI_BOOT && !SD_BOOT_QSPI && !SD_BOOT) select FSL_LAYERSCAPE select FSL_LSCH2 select GICV2 @@ -100,7 +100,7 @@ config ARCH_LS1043A config ARCH_LS1046A bool select ARMV8_SET_SMPEN - select FSL_IFC if TFABOOT || (!QSPI_BOOT && !SD_BOOT_QSPI) + select FSL_IFC if TFABOOT || (!QSPI_BOOT && !SD_BOOT_QSPI && !SD_BOOT) select FSL_LAYERSCAPE select FSL_LSCH2 select GICV2 diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index c989a43cbe..487c0ed553 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -1229,6 +1229,7 @@ int timer_init(void) return 0; } +#if !CONFIG_IS_ENABLED(SYSRESET) __efi_runtime_data u32 __iomem *rstcr = (u32 *)CONFIG_SYS_FSL_RST_ADDR; void __efi_runtime reset_cpu(void) @@ -1248,6 +1249,7 @@ void __efi_runtime reset_cpu(void) scfg_out32(rstcr, val); #endif } +#endif #if defined(CONFIG_EFI_LOADER) && !defined(CONFIG_PSCI_RESET) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/icid.c b/arch/arm/cpu/armv8/fsl-layerscape/icid.c index 25cd82f16e..2d87281ec2 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/icid.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/icid.c @@ -46,6 +46,7 @@ void set_icids(void) #endif } +#ifndef CONFIG_SPL_BUILD int fdt_set_iommu_prop(void *blob, int off, int smmu_ph, u32 *ids, int num_ids) { int i, ret; @@ -190,3 +191,4 @@ void fdt_fixup_icid(void *blob) fdt_fixup_fman_icids(blob, smmu_ph); #endif } +#endif diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index 926f8f21b6..515dbe02fd 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -682,7 +682,7 @@ void fsl_lsch2_early_init_f(void) SCFG_SNPCNFGCR_USB1WRSNP | SCFG_SNPCNFGCR_USB2RDSNP | SCFG_SNPCNFGCR_USB2WRSNP | SCFG_SNPCNFGCR_USB3RDSNP | SCFG_SNPCNFGCR_USB3WRSNP | SCFG_SNPCNFGCR_SATARDSNP | - SCFG_SNPCNFGCR_SATAWRSNP); + SCFG_SNPCNFGCR_SATAWRSNP | SCFG_SNPCNFGCR_EDMASNP); #elif defined(CONFIG_ARCH_LS1012A) setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SECRDSNP | SCFG_SNPCNFGCR_SECWRSNP | SCFG_SNPCNFGCR_USB1RDSNP | |