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authorPatrick Delaunay <patrick.delaunay@foss.st.com>2022-07-06 18:20:25 +0200
committerPatrick Delaunay <patrick.delaunay@foss.st.com>2022-07-12 11:46:30 +0200
commit44db098ae1d91bde3bd52097ab3a1a52f5b4ed84 (patch)
tree5f3b9cc7c995644731b2b72abb27311796e9dc7a
parent0b69ce6a816c39502941deb90543e23619e02896 (diff)
ARM: dts: stm32mp13: add SCMI nodes
Add the node for SCMI firmware with the associated reserved memory nodes Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
-rw-r--r--arch/arm/dts/stm32mp13-u-boot.dtsi20
-rw-r--r--arch/arm/dts/stm32mp131.dtsi31
2 files changed, 51 insertions, 0 deletions
diff --git a/arch/arm/dts/stm32mp13-u-boot.dtsi b/arch/arm/dts/stm32mp13-u-boot.dtsi
index adc7e67ee5..01552adb7c 100644
--- a/arch/arm/dts/stm32mp13-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp13-u-boot.dtsi
@@ -90,6 +90,26 @@
u-boot,dm-pre-reloc;
};
+&scmi {
+ u-boot,dm-pre-reloc;
+};
+
+&scmi_clk {
+ u-boot,dm-pre-reloc;
+};
+
+&scmi_reset {
+ u-boot,dm-pre-reloc;
+};
+
+&scmi_shm {
+ u-boot,dm-pre-reloc;
+};
+
+&scmi_sram {
+ u-boot,dm-pre-reloc;
+};
+
&syscfg {
u-boot,dm-pre-reloc;
};
diff --git a/arch/arm/dts/stm32mp131.dtsi b/arch/arm/dts/stm32mp131.dtsi
index 652743fd06..8f7af65e3e 100644
--- a/arch/arm/dts/stm32mp131.dtsi
+++ b/arch/arm/dts/stm32mp131.dtsi
@@ -27,11 +27,42 @@
interrupt-parent = <&intc>;
};
+ scmi_sram: sram@2ffff000 {
+ compatible = "mmio-sram";
+ reg = <0x2ffff000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x2ffff000 0x1000>;
+
+ scmi_shm: scmi_shm@0 {
+ compatible = "arm,scmi-shmem";
+ reg = <0 0x80>;
+ };
+ };
+
firmware {
optee: optee {
method = "smc";
compatible = "linaro,optee-tz";
};
+
+ scmi: scmi {
+ compatible = "linaro,scmi-optee";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ linaro,optee-channel-id = <0>;
+ shmem = <&scmi_shm>;
+
+ scmi_clk: protocol@14 {
+ reg = <0x14>;
+ #clock-cells = <1>;
+ };
+
+ scmi_reset: protocol@16 {
+ reg = <0x16>;
+ #reset-cells = <1>;
+ };
+ };
};
clocks {