aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorHan Gao <gaohan@iscas.ac.cn>2024-01-31 13:37:42 +0800
committerHan Gao/Revy/Rabenda <rabenda.cn@gmail.com>2024-01-31 16:19:17 +0800
commit4529d8d50fe090fd87f5edc847bfb9ea1ea66071 (patch)
tree9031bab49b054573d24ea7458ae599f92c352a63
parent74eca2553e65b88ded31a0ec9a462106bbb6a35c (diff)
Revert "fix(c9xx): don't flush dcache when invalidating"
This reverts commit adec30ace4cebb0554bb246b52eebaf37c1545c4.
-rw-r--r--arch/riscv/cpu/c9xx/cpu.c10
-rw-r--r--cmd/ddrscan.c1
-rw-r--r--cmd/prbs.c3
-rw-r--r--drivers/mmc/sdhci.c3
-rw-r--r--drivers/usb/dwc3/ep0.c3
5 files changed, 17 insertions, 3 deletions
diff --git a/arch/riscv/cpu/c9xx/cpu.c b/arch/riscv/cpu/c9xx/cpu.c
index a93a3060..e5eaed94 100644
--- a/arch/riscv/cpu/c9xx/cpu.c
+++ b/arch/riscv/cpu/c9xx/cpu.c
@@ -105,6 +105,16 @@ void invalidate_dcache_range(unsigned long start, unsigned long end)
register unsigned long i asm("a0") = start & ~(CONFIG_SYS_CACHELINE_SIZE - 1);
for (; i < end; i += CONFIG_SYS_CACHELINE_SIZE)
+ asm volatile(".long 0x02b5000b"); /* dcache.cipa a0 */
+
+ sync_is();
+}
+
+void invalid_dcache_range(unsigned long start, unsigned long end)
+{
+ register unsigned long i asm("a0") = start & ~(CONFIG_SYS_CACHELINE_SIZE - 1);
+
+ for (; i < end; i += CONFIG_SYS_CACHELINE_SIZE)
asm volatile(".long 0x02a5000b"); /* dcache.ipa a0 */
sync_is();
diff --git a/cmd/ddrscan.c b/cmd/ddrscan.c
index c550e03d..0f2b78c6 100644
--- a/cmd/ddrscan.c
+++ b/cmd/ddrscan.c
@@ -73,6 +73,7 @@ extern ulong mem_test_quick(vu_long *buf, ulong start_addr, ulong end_addr,
#endif
extern void flush_dcache_range(unsigned long start, unsigned long end);
extern void invalidate_dcache_range(unsigned long start, unsigned long end);
+extern void invalid_dcache_range(unsigned long start, unsigned long end);
#ifdef CONFIG_CMD_MEMTEST
int test_stuck_address(ulv *bufa, ulong count);
diff --git a/cmd/prbs.c b/cmd/prbs.c
index 59471169..2bbb68cf 100644
--- a/cmd/prbs.c
+++ b/cmd/prbs.c
@@ -50,6 +50,7 @@ u64 t_end;
extern void flush_dcache_range(unsigned long start, unsigned long end);
extern void invalidate_dcache_range(unsigned long start, unsigned long end);
+extern void invalid_dcache_range(unsigned long start, unsigned long end);
extern unsigned long get_ddr_density(void);
extern int riscv_get_time(u64 *time);
@@ -304,7 +305,7 @@ int prbs_test(struct PRBS_ELE *prbs, unsigned int *buf, int pos, bool random_dq,
// compare result
// invalid cache before read
mdelay(100);
- invalidate_dcache_range((ulong)buf, (ulong)buf+(bit_len*4*2*2));
+ invalid_dcache_range((ulong)buf, (ulong)buf+(bit_len*4*2*2));
p1 = buf;
bit_cnt = 0;
for (i = 0; i < bit_len; i++) {
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 349e2bc1..5cc70cda 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -247,9 +247,10 @@ static int sdhci_transfer_data(struct sdhci_host *host, struct mmc_data *data)
}
} while (!(stat & SDHCI_INT_DATA_END));
#ifdef CONFIG_TARGET_LIGHT_C910
+ extern void invalid_dcache_range(unsigned long start, unsigned long end);
/*After read ,invalid dcache range again to avoid cache filled during read tranfer*/
if(data->flags == MMC_DATA_READ){
- invalidate_dcache_range(host->start_addr,host->start_addr+ROUND(data->blocks*data->blocksize, ARCH_DMA_MINALIGN));
+ invalid_dcache_range(host->start_addr,host->start_addr+ROUND(data->blocks*data->blocksize, ARCH_DMA_MINALIGN));
}
#endif
return 0;
diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c
index 1e07bdf8..ea21f36d 100644
--- a/drivers/usb/dwc3/ep0.c
+++ b/drivers/usb/dwc3/ep0.c
@@ -906,7 +906,8 @@ static void dwc3_ep0_xfer_complete(struct dwc3 *dwc,
dep->resource_index = 0;
dwc->setup_packet_pending = false;
#ifdef CONFIG_TARGET_LIGHT_C910
- invalidate_dcache_range((unsigned long)dwc->ctrl_req, (dmaaddr_t)dwc->ctrl_req + ROUND(sizeof(*dwc->ctrl_req), CACHELINE_SIZE));
+ extern void invalid_dcache_range(unsigned long start, unsigned long end);
+ invalid_dcache_range((unsigned long)dwc->ctrl_req, (dmaaddr_t)dwc->ctrl_req + ROUND(sizeof(*dwc->ctrl_req), CACHELINE_SIZE));
#endif
switch (dwc->ep0state) {