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authorIcenowy Zheng <uwu@icenowy.me>2023-07-21 14:19:34 +0800
committerHan Gao <rabenda.cn@gmail.com>2023-08-02 02:58:25 +0800
commit32c42cd31ce2e72e183d16b61845c55ed2c30385 (patch)
treeb642c862cd0ab016500b57161768536986e9e077
parent6fb1286862c7d60064976360d36b95df7d8ca5ef (diff)
add row16 option
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
-rw-r--r--board/thead/light-c910/Kconfig5
-rw-r--r--board/thead/light-c910/lpddr4/src/ddr_common_func.c8
2 files changed, 13 insertions, 0 deletions
diff --git a/board/thead/light-c910/Kconfig b/board/thead/light-c910/Kconfig
index 8139eeed..26907eae 100644
--- a/board/thead/light-c910/Kconfig
+++ b/board/thead/light-c910/Kconfig
@@ -213,6 +213,11 @@ config DDR_LP4_2133_SINGLERANK
help
Enabling this will support lpddr4 2133 singlerank configuration.
+config DDR_ROW16
+ bool "LPDDR4/4X 17-bit row address support"
+ help
+ Enabling this will support ddr 17-bit row address (16:0).
+
config DDR_H32_MODE
bool "LPDDR4/4X 32bit mode configuration"
help
diff --git a/board/thead/light-c910/lpddr4/src/ddr_common_func.c b/board/thead/light-c910/lpddr4/src/ddr_common_func.c
index 50f1dea9..eaa59bd2 100644
--- a/board/thead/light-c910/lpddr4/src/ddr_common_func.c
+++ b/board/thead/light-c910/lpddr4/src/ddr_common_func.c
@@ -873,7 +873,11 @@ if(bits==64) {
#endif
wr(ADDRMAP0,0x0004001f); // +2
if(rank_num==2) {
+#ifdef CONFIG_DDR_ROW16
+ wr(ADDRMAP0,0x00040019);//16GB
+#else
wr(ADDRMAP0,0x00040018);//8GB
+#endif
}
wr(ADDRMAP1,0x00090909); //bank +2
wr(ADDRMAP2,0x00000000); //col b5+5 ~ col b2 +2
@@ -881,7 +885,11 @@ if(bits==64) {
wr(ADDRMAP4,0x00001f1f); //col b11~ col b10
wr(ADDRMAP5,0x080f0808); //row_b11 row b2_10 row b1 row b0 +6
wr(ADDRMAP6,0x08080808);
+#ifdef CONFIG_DDR_ROW16
+ wr(ADDRMAP7,0x00000f08);
+#else
wr(ADDRMAP7,0x00000f0f);
+#endif
wr(ADDRMAP9,0x08080808);
wr(ADDRMAP10,0x08080808);
wr(ADDRMAP11,0x00000008);