1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
|
// SPDX-FileCopyrightText: 2024 Himbeer <himbeer@disroot.org>
//
// SPDX-License-Identifier: AGPL-3.0-or-later
const std = @import("std");
const debug_console = @import("sbi/debug_console.zig");
const fdt = @import("fdt.zig");
const u_boot = @import("u_boot.zig");
const pci = @import("pci.zig");
var heap = [_]u8{0} ** 0x10000;
export fn start() i32 {
return kmain();
}
fn kmain() i32 {
const w = debug_console.writer() catch return 1;
w.print("Initializing...\r\n", .{}) catch return 1;
run(w) catch |err| {
w.print("Fatal error: {any:.}\r\n", .{err}) catch return 1;
return 1;
};
return 0;
}
fn run(w: debug_console.Writer) !void {
const global_data = u_boot.globalDataFromGlobalPointer();
try w.print("Located FDT: 0x{x}\r\n", .{@intFromPtr(global_data.fdt_blob)});
var fba = std.heap.FixedBufferAllocator.init(&heap);
const allocator = fba.allocator();
const dt_header = try fdt.Header.parse(global_data.fdt_blob);
const dt = try dt_header.parseTree(allocator);
try w.print("Loaded and parsed FDT\r\n", .{});
const pci_controller = try pci.controllerFromFdt(&dt);
try w.print("Located PCI MMIO register\r\n", .{});
for (0..256) |bus| {
for (0..32) |device| {
const cfg_space = pci_controller.cfgSpace(@intCast(bus), @intCast(device), 0);
const vendor_id = cfg_space.getVendorId();
const device_id = cfg_space.getDeviceId();
const class = cfg_space.getClass();
const subclass = cfg_space.getSubclass();
if (vendor_id != 0xffff) {
try w.print("Found PCI device {:0>3}.{:0>3}: vendor=0x{x:0>4} dev=0x{x:0>4} class=0x{x:0>4} subclass=0x{x:0>4}\r\n", .{ bus, device, vendor_id, device_id, class, subclass });
}
}
}
}
|