5 files changed, 35 insertions, 28 deletions
diff --git a/src/lib/instructions.zig b/src/lib/instructions.zig
index 2ae53ec..81775b2 100644
--- a/src/lib/instructions.zig
+++ b/src/lib/instructions.zig
@@ -4,6 +4,7 @@
 
 const std = @import("std");
 
+const interrupts = @import("interrupts.zig");
 const paging = @import("paging.zig");
 
 pub const SbiRet = struct {
@@ -44,15 +45,26 @@ pub fn stackPointer() usize {
     );
 }
 
-pub const setSatp = setCsrFn(paging.Satp, "satp").?;
-pub const setSscratch = setCsrFn(usize, "sscratch").?;
-pub const setSepc = setCsrFn(usize, "sepc").?;
+pub const satp = Csr(paging.Satp, "satp");
+pub const sie = Csr(interrupts.Enable, "sie");
+pub const sscratch = Csr(usize, "sscratch");
+pub const sepc = Csr(usize, "sepc");
 
-pub fn setCsrFn(comptime T: type, csr: []const u8) ?fn (T) callconv(.Inline) void {
-    if (csr.len > 8) return null;
+pub fn Csr(comptime T: type, csr: []const u8) type {
+    if (csr.len > 8) @compileError("CSR name length exceeds 8 characters");
 
     return struct {
-        inline fn setCsr(value: T) void {
+        pub inline fn read() T {
+            comptime var buf = [_]u8{0} ** 23;
+
+            const bits = asm volatile (std.fmt.bufPrint(buf[0..], "csrr %[bits], {s}", .{csr}) catch unreachable
+                : [bits] "=r" (-> usize),
+            );
+
+            return @bitCast(bits);
+        }
+
+        pub inline fn write(value: T) void {
             const bits: usize = @bitCast(value);
 
             comptime var buf = [_]u8{0} ** 23;
@@ -62,5 +74,5 @@ pub fn setCsrFn(comptime T: type, csr: []const u8) ?fn (T) callconv(.Inline) voi
                 : [bits] "r" (bits),
             );
         }
-    }.setCsr;
+    };
 }
diff --git a/src/lib/interrupts.zig b/src/lib/interrupts.zig
index 35a20d4..febe660 100644
--- a/src/lib/interrupts.zig
+++ b/src/lib/interrupts.zig
@@ -328,5 +328,3 @@ pub fn init() void {
         : [trapframe] "r" (&trap_frame),
     );
 }
-
-pub const setEnabled = instructions.setCsrFn(Enable, "sie").?;
diff --git a/src/lib/paging.zig b/src/lib/paging.zig
index 1e785e7..52ea5a6 100644
--- a/src/lib/paging.zig
+++ b/src/lib/paging.zig
@@ -441,10 +441,10 @@ pub const Table = struct {
     }
 
     pub fn mapDevice(root: *Table, reg: *hwinfo.Reg) !void {
-        const physical_start = reg.start & ~(page_size - 1);
-        const physical_end = (reg.start + reg.len - 1) & ~(page_size - 1);
+        const physical_start = reg.addr & ~(page_size - 1);
+        const physical_end = (reg.addr + reg.len - 1) & ~(page_size - 1);
 
-        reg.addr = next_mmio_vaddr | (reg.start & (page_size - 1));
+        reg.addr = next_mmio_vaddr | (reg.addr & (page_size - 1));
 
         var paddr = physical_start;
         while (paddr <= physical_end) : (paddr += page_size) {
diff --git a/src/lib/pci.zig b/src/lib/pci.zig
index 7b862ee..573ff18 100644
--- a/src/lib/pci.zig
+++ b/src/lib/pci.zig
@@ -5,17 +5,10 @@
 const std = @import("std");
 
 const hwinfo = @import("hwinfo.zig");
+const paging = @import("paging.zig");
 
 pub const Error = error{
-    NoRootNode,
-    NoSoCnode,
-    NoAddrCells,
-    NoSizeCells,
-    NoPcinode,
-    NoUnitAddr,
-    NoReg,
-    NoCompatInfo,
-    Incompatible,
+    NoPciController,
 };
 
 pub const CamType = enum {
@@ -747,15 +740,19 @@ pub const CfgSpace = packed struct(u576) {
     }
 };
 
-pub fn controllerFromHwInfo() ?Controller {
+pub fn controllerFromHwInfo(kmem: *paging.Table) !Controller {
     var pcie = hwinfo.byKind(.pcie);
     var pci = hwinfo.byKind(.pci);
 
     if (try pcie.next()) |ecam| {
-        return Controller{ .enhanced = .{ .reg = ecam.reg.slice(u8) } };
+        var reg = ecam.reg;
+        try kmem.mapDevice(&reg);
+        return Controller{ .enhanced = .{ .reg = reg.slice(u8) } };
     } else if (try pci.next()) |cam| {
-        return Controller{ .conventional = .{ .reg = cam.reg.slice(u8) } };
+        var reg = cam.reg;
+        try kmem.mapDevice(&reg);
+        return Controller{ .conventional = .{ .reg = reg.slice(u8) } };
     } else {
-        return null;
+        return Error.NoPciController;
     }
 }
diff --git a/src/lib/process.zig b/src/lib/process.zig
index 7b3e696..05c6773 100644
--- a/src/lib/process.zig
+++ b/src/lib/process.zig
@@ -93,7 +93,7 @@ pub fn next() ?*Info {
 pub fn switchTo(proc: *Info) noreturn {
     proc.state = .active;
 
-    instructions.setSscratch(@intFromPtr(&proc.trap_frame));
+    instructions.sscratch.write(@intFromPtr(&proc.trap_frame));
 
     asm volatile (
         \\ csrr t0, sstatus
@@ -103,8 +103,8 @@ pub fn switchTo(proc: *Info) noreturn {
         \\ csrw sstatus, t0
         ::: "t0", "t1");
 
-    instructions.setSepc(proc.pc);
-    instructions.setSatp(proc.satp());
+    instructions.sepc.write(proc.pc);
+    instructions.satp.write(proc.satp());
 
     // Probably not always needed. Let's not take the risk for now.
     asm volatile (