diff options
author | Himbeer <himbeer@disroot.org> | 2024-05-20 22:14:06 +0200 |
---|---|---|
committer | Himbeer <himbeer@disroot.org> | 2024-05-20 22:14:06 +0200 |
commit | c8216154bbbefd522b5ca974416fa4e572208e14 (patch) | |
tree | 13d0597d7725bd4ffa9036030b3604a24b029c17 /src | |
parent | bf744a390dd6eb79fbac7ec3bb1295bda5c06741 (diff) |
console: Remove UART driver
Diffstat (limited to 'src')
-rw-r--r-- | src/Console.zig | 14 | ||||
-rw-r--r-- | src/main.zig | 4 | ||||
-rw-r--r-- | src/uart.zig | 60 |
3 files changed, 0 insertions, 78 deletions
diff --git a/src/Console.zig b/src/Console.zig index e973c7d..ad2249e 100644 --- a/src/Console.zig +++ b/src/Console.zig @@ -8,30 +8,17 @@ const debug_console = @import("sbi/debug_console.zig"); const fdt = @import("fdt.zig"); const legacy = @import("sbi/legacy.zig"); const paging = @import("paging.zig"); -const uart = @import("uart.zig"); provider: Provider, const Self = @This(); pub const Provider = union(enum) { - uart_port: uart.Port.Writer, sbi_debug: debug_console.Writer, sbi_legacy: legacy.Writer, }; -pub fn init(kmem: *paging.Table, dt: *const fdt.Tree, allocator: std.mem.Allocator) !void { - if (uart.default == null) { - try uart.init(kmem, dt, allocator); - } -} - pub fn autoChoose() ?Self { - if (uart.default) |uart_con| { - return .{ - .provider = .{ .uart_port = uart_con.writer() }, - }; - } if (debug_console.writer()) |sbi_con| { return .{ .provider = .{ .sbi_debug = sbi_con }, @@ -48,7 +35,6 @@ pub fn autoChoose() ?Self { pub fn writer(console: *const Self) std.io.AnyWriter { switch (console.provider) { - .uart_port => return console.provider.uart_port.any(), .sbi_debug => return console.provider.sbi_debug.any(), .sbi_legacy => return console.provider.sbi_legacy.any(), } diff --git a/src/main.zig b/src/main.zig index 75573d6..9ed197c 100644 --- a/src/main.zig +++ b/src/main.zig @@ -14,8 +14,6 @@ const pci = @import("pci.zig"); const plic = @import("plic.zig"); const process = @import("process.zig"); -const legacy = @import("sbi/legacy.zig"); - const Error = error{ HartIdOutOfRange, SuspiciousFdtAddr, @@ -77,8 +75,6 @@ fn run(hart_id: usize, fdt_blob: *fdt.RawHeader) !noreturn { fdt.default = try dt_header.parseTree(allocator); - //try Console.init(kmem, &fdt.default, allocator); - var console = Console.autoChoose() orelse while (true) asm volatile ("wfi"); var w = console.writer(); diff --git a/src/uart.zig b/src/uart.zig deleted file mode 100644 index 9374a41..0000000 --- a/src/uart.zig +++ /dev/null @@ -1,60 +0,0 @@ -// SPDX-FileCopyrightText: 2024 Himbeer <himbeer@disroot.org> -// -// SPDX-License-Identifier: AGPL-3.0-or-later - -const std = @import("std"); - -const fdt = @import("fdt.zig"); -const paging = @import("paging.zig"); - -pub var default: ?Port = null; - -pub const Error = error{ - NoSocNode, -}; - -pub const Port = struct { - reg: []volatile u8, - reg_shift: u6, - - const lsr_thre = 1 << 5; - - pub const Writer = std.io.Writer(Port, error{}, write); - - fn isWriteReady(self: Port) bool { - return self.reg[@as(usize, 5) << self.reg_shift] & lsr_thre != 0; - } - - pub fn write(self: Port, bytes: []const u8) !usize { - for (bytes) |byte| { - while (!self.isWriteReady()) {} - self.reg[0] = byte; - } - - return bytes.len; - } - - pub fn writer(port: Port) Writer { - return .{ .context = port }; - } -}; - -pub fn init(kmem: *paging.Table, dt: *const fdt.Tree, allocator: std.mem.Allocator) !void { - var soc = fdt.findPathExact(dt, "/soc") orelse return Error.NoSocNode; - - const compatible = fdt.findCompatible(&soc, &[_][]const u8{ "ns16550", "snps,dw-apb-uart" }, 1); - - const node = if (compatible.len > 0) compatible[0] else return; - - const regs = try node.reg(allocator); - defer regs.deinit(); - - //const reg = try kmem.mapDevice(regs.items[0]); - _ = try kmem.mapDevice(regs.items[0]); - - const reg_shift_bytes = node.props.get("reg-shift"); - const reg_shift = if (reg_shift_bytes) |bytes| std.mem.readInt(u32, bytes[0..4], .big) else 0; - - //default = .{ .reg = reg.slice(u8), .reg_shift = @intCast(reg_shift) }; - default = .{ .reg = regs.items[0].slice(u8), .reg_shift = @intCast(reg_shift) }; -} |