diff options
author | Himbeer <himbeer@disroot.org> | 2024-07-04 13:27:00 +0200 |
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committer | Himbeer <himbeer@disroot.org> | 2024-07-04 13:27:00 +0200 |
commit | 59252492c3dd99bebc53000b649cb457a0e05a98 (patch) | |
tree | 7ea7131886b8b83482187ad833e2de8a3d0e4dc9 /src/lib/interrupts.zig | |
parent | f18476a5e0e4c66ec6b46f5744ea2be08a664540 (diff) |
interrupts: Print PID for synchronous exceptions
Diffstat (limited to 'src/lib/interrupts.zig')
-rw-r--r-- | src/lib/interrupts.zig | 26 |
1 files changed, 15 insertions, 11 deletions
diff --git a/src/lib/interrupts.zig b/src/lib/interrupts.zig index 3a012c3..8d88d64 100644 --- a/src/lib/interrupts.zig +++ b/src/lib/interrupts.zig @@ -140,43 +140,47 @@ export fn handleTrap(epc: usize, tval: usize, cause_bits: usize, frame: *trap.Fr }, } } else { - const proc = &process.list.last.?.data; - proc.state = .waiting; + const pid = if (status.previous_privilege == .user) blk: { + const proc = &process.list.last.?.data; + proc.state = .waiting; + break :blk proc.id; + } else 0; switch (@as(SyncCause, @enumFromInt(cause.num))) { .illegal_instruction => { - std.debug.panic("Hart {d}: Illegal instruction, EPC = 0x{x:0>16}", .{ frame.hart_id, epc }); + std.debug.panic("Hart {d}, PID = {d}: Illegal instruction, EPC = 0x{x:0>16}", .{ frame.hart_id, pid, epc }); }, .instruction_access_fault => { - std.debug.panic("Hart {d}: Instruction access fault: EPC = 0x{x:0>16}, TVAL = 0x{x:0>16}", .{ frame.hart_id, epc, tval }); + std.debug.panic("Hart {d}, PID = {d}: Instruction access fault: EPC = 0x{x:0>16}, TVAL = 0x{x:0>16}", .{ frame.hart_id, pid, epc, tval }); }, .load_access_fault => { - std.debug.panic("Hart {d}: Load access fault: EPC = 0x{x:0>16}, TVAL = 0x{x:0>16}", .{ frame.hart_id, epc, tval }); + std.debug.panic("Hart {d}, PID = {d}: Load access fault: EPC = 0x{x:0>16}, TVAL = 0x{x:0>16}", .{ frame.hart_id, pid, epc, tval }); }, .store_or_amo_access_fault => { - std.debug.panic("Hart {d}: Store/AMO access fault: EPC = 0x{x:0>16}, TVAL = 0x{x:0>16}", .{ frame.hart_id, epc, tval }); + std.debug.panic("Hart {d}, PID = {d}: Store/AMO access fault: EPC = 0x{x:0>16}, TVAL = 0x{x:0>16}", .{ frame.hart_id, pid, epc, tval }); }, .ecall => { + const proc = &process.list.last.?.data; syscall.handler(proc, frame) catch |err| switch (err) { syscall.Error.UnknownSyscall => { const a7 = frame.general_purpose_registers[17]; - w.print("Hart {d}: Unknown syscall, a7 = 0x{x:0>16}\r\n", .{ frame.hart_id, a7 }) catch unreachable; + w.print("Hart {d}, PID = {d}: Unknown syscall, a7 = 0x{x:0>16}\r\n", .{ frame.hart_id, pid, a7 }) catch unreachable; }, }; return epc + 4; }, .instruction_page_fault => { - std.debug.panic("Hart {d}: Instruction page fault: EPC = 0x{x:0>16}, TVAL = 0x{x:0>16}", .{ frame.hart_id, epc, tval }); + std.debug.panic("Hart {d}, PID = {d}: Instruction page fault: EPC = 0x{x:0>16}, TVAL = 0x{x:0>16}", .{ frame.hart_id, pid, epc, tval }); }, .load_page_fault => { - std.debug.panic("Hart {d}: Load page fault: EPC = 0x{x:0>16}, TVAL = 0x{x:0>16}", .{ frame.hart_id, epc, tval }); + std.debug.panic("Hart {d}, PID = {d}: Load page fault: EPC = 0x{x:0>16}, TVAL = 0x{x:0>16}", .{ frame.hart_id, pid, epc, tval }); }, .store_or_amo_page_fault => { - std.debug.panic("Hart {d}: Store/AMO page fault: EPC = 0x{x:0>16}, TVAL = 0x{x:0>16}", .{ frame.hart_id, epc, tval }); + std.debug.panic("Hart {d}, PID = {d}: Store/AMO page fault: EPC = 0x{x:0>16}, TVAL = 0x{x:0>16}", .{ frame.hart_id, pid, epc, tval }); }, else => { - std.debug.panic("Hart {d}: Unhandled synchronous interrupt: {d}, EPC = 0x{x:0>16}", .{ frame.hart_id, cause.num, epc }); + std.debug.panic("Hart {d}, PID = {d}: Unhandled synchronous interrupt: {d}, EPC = 0x{x:0>16}", .{ frame.hart_id, pid, cause.num, epc }); }, } } |