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authorHimbeer <himbeer@disroot.org>2024-05-20 22:12:33 +0200
committerHimbeer <himbeer@disroot.org>2024-05-20 22:12:33 +0200
commitbf744a390dd6eb79fbac7ec3bb1295bda5c06741 (patch)
tree5e00d6c33960308a406b8612babdf19baf6f2598
parent6db0b6c8dd044b49a2e8a65dfc95a1b296f3ef2e (diff)
Attempt to fix zeroed stack, unsuccessfully
-rw-r--r--linker.ld19
-rw-r--r--src/Console.zig11
-rw-r--r--src/main.zig44
-rw-r--r--src/paging.zig6
-rw-r--r--src/process.zig2
-rw-r--r--src/sbi/legacy.zig41
-rw-r--r--src/uart.zig6
7 files changed, 114 insertions, 15 deletions
diff --git a/linker.ld b/linker.ld
index 4dbfb17..c02b466 100644
--- a/linker.ld
+++ b/linker.ld
@@ -27,6 +27,9 @@ SECTIONS {
PROVIDE(_text_end = .);
} > ram AT > ram : lo_rx
+
+ PROVIDE(_global_pointer = .);
+
.rodata : ALIGN(4K) {
PROVIDE(_rodata_start = .);
@@ -37,10 +40,17 @@ SECTIONS {
.data : ALIGN(4K) {
PROVIDE(_data_start = .);
- *(.data .data.* )
+ *(.data .data.*)
PROVIDE(_data_end = .);
} > ram AT > ram : lo_rw
+ .sdata : ALIGN(4K) {
+ PROVIDE(_sdata_start = .);
+
+ *(.sdata .sdata.*)
+
+ PROVIDE(_sdata_end = .);
+ } > ram AT > ram : lo_rw
.bss : ALIGN(4K) {
PROVIDE(_bss_start = .);
@@ -48,6 +58,13 @@ SECTIONS {
PROVIDE(_bss_end = .);
} > ram AT > ram : lo_rw
+ .sbss : ALIGN(4K) {
+ PROVIDE(_sbss_start = .);
+
+ *(.sbss .sbss.*)
+
+ PROVIDE(_sbss_end = .);
+ } > ram AT > ram : lo_rw
/DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) }
diff --git a/src/Console.zig b/src/Console.zig
index a54bb41..e973c7d 100644
--- a/src/Console.zig
+++ b/src/Console.zig
@@ -6,6 +6,7 @@ const std = @import("std");
const debug_console = @import("sbi/debug_console.zig");
const fdt = @import("fdt.zig");
+const legacy = @import("sbi/legacy.zig");
const paging = @import("paging.zig");
const uart = @import("uart.zig");
@@ -16,6 +17,7 @@ const Self = @This();
pub const Provider = union(enum) {
uart_port: uart.Port.Writer,
sbi_debug: debug_console.Writer,
+ sbi_legacy: legacy.Writer,
};
pub fn init(kmem: *paging.Table, dt: *const fdt.Tree, allocator: std.mem.Allocator) !void {
@@ -29,11 +31,17 @@ pub fn autoChoose() ?Self {
return .{
.provider = .{ .uart_port = uart_con.writer() },
};
- } else if (debug_console.writer()) |sbi_con| {
+ }
+ if (debug_console.writer()) |sbi_con| {
return .{
.provider = .{ .sbi_debug = sbi_con },
};
} else |_| {}
+ if (legacy.writer()) |sbi_legacy_con| {
+ return .{
+ .provider = .{ .sbi_legacy = sbi_legacy_con },
+ };
+ } else |_| {}
return null;
}
@@ -42,5 +50,6 @@ pub fn writer(console: *const Self) std.io.AnyWriter {
switch (console.provider) {
.uart_port => return console.provider.uart_port.any(),
.sbi_debug => return console.provider.sbi_debug.any(),
+ .sbi_legacy => return console.provider.sbi_legacy.any(),
}
}
diff --git a/src/main.zig b/src/main.zig
index 540e8f8..75573d6 100644
--- a/src/main.zig
+++ b/src/main.zig
@@ -14,6 +14,8 @@ const pci = @import("pci.zig");
const plic = @import("plic.zig");
const process = @import("process.zig");
+const legacy = @import("sbi/legacy.zig");
+
const Error = error{
HartIdOutOfRange,
SuspiciousFdtAddr,
@@ -42,6 +44,11 @@ pub fn panic(msg: []const u8, error_return_trace: ?*std.builtin.StackTrace, ret_
export fn _start() callconv(.Naked) noreturn {
// Stack grows down, use (exclusive) end instead of start.
asm volatile (
+ \\ .option push
+ \\ .option norelax
+ \\ la gp, _global_pointer
+ \\ .option pop
+ \\
\\ la sp, _stack_end
\\ call %[function]
:
@@ -70,10 +77,10 @@ fn run(hart_id: usize, fdt_blob: *fdt.RawHeader) !noreturn {
fdt.default = try dt_header.parseTree(allocator);
- try Console.init(kmem, &fdt.default, allocator);
+ //try Console.init(kmem, &fdt.default, allocator);
- const console = Console.autoChoose() orelse while (true) asm volatile ("wfi");
- const w = console.writer();
+ var console = Console.autoChoose() orelse while (true) asm volatile ("wfi");
+ var w = console.writer();
try w.print("\r\n", .{});
try w.print("Console init\r\n", .{});
@@ -84,12 +91,12 @@ fn run(hart_id: usize, fdt_blob: *fdt.RawHeader) !noreturn {
try w.print("\r\n", .{});
try w.print("===================== Kernel Page Table =====================\r\n", .{});
- try w.print("MMIO: 0x{x:0>8} - 0x{x:0>8} -> identity mapped (rw-)\r\n", .{ paging.mmio_start, paging.mmio_end });
- try w.print("\r\n", .{});
try w.print(".text: 0x{x:0>8} - 0x{x:0>8} -> identity mapped (r-x)\r\n", .{ @intFromPtr(paging.text_start), @intFromPtr(paging.text_end) });
try w.print(".rodata: 0x{x:0>8} - 0x{x:0>8} -> identity mapped (r--)\r\n", .{ @intFromPtr(paging.rodata_start), @intFromPtr(paging.rodata_end) });
try w.print(".data: 0x{x:0>8} - 0x{x:0>8} -> identity mapped (rw-)\r\n", .{ @intFromPtr(paging.data_start), @intFromPtr(paging.data_end) });
+ try w.print(".sdata: 0x{x:0>8} - 0x{x:0>8} -> identity mapped (rw-)\r\n", .{ @intFromPtr(paging.sdata_start), @intFromPtr(paging.sdata_end) });
try w.print(".bss: 0x{x:0>8} - 0x{x:0>8} -> identity mapped (rw-)\r\n", .{ @intFromPtr(paging.bss_start), @intFromPtr(paging.bss_end) });
+ try w.print(".sbss: 0x{x:0>8} - 0x{x:0>8} -> identity mapped (rw-)\r\n", .{ @intFromPtr(paging.sbss_start), @intFromPtr(paging.sbss_end) });
try w.print("Stack: 0x{x:0>8} - 0x{x:0>8} -> identity mapped (rw-)\r\n", .{ @intFromPtr(paging.stack_start), @intFromPtr(paging.stack_end) });
try w.print("Trap Stack: 0x{x:0>8} - 0x{x:0>8} -> identity mapped (rw-)\r\n", .{ @intFromPtr(paging.stvec_stack_start), @intFromPtr(paging.stvec_stack_end) });
try w.print("\r\n", .{});
@@ -99,15 +106,32 @@ fn run(hart_id: usize, fdt_blob: *fdt.RawHeader) !noreturn {
try w.print("=============================================================\r\n", .{});
try w.print("\r\n", .{});
- instructions.setSatp(kmem.satp(0));
-
- try w.print("Paging : Sv39\r\n", .{});
-
interrupts.init();
interrupts.setEnabled(interrupts.Enable.all);
try w.print("Interrupts : All\r\n", .{});
- try w.print("\r\n", .{});
+ instructions.setSatp(kmem.satp(0));
+ const console2 = Console.autoChoose() orelse while (true) asm volatile ("wfi");
+ const w2 = console2.writer();
+ try w2.print("Paging : Sv39\r\n", .{});
+
+ try w2.print("\r\n", .{});
+
+ //instructions.setSatp(.{
+ // .ppn = 0,
+ // .asid = 0,
+ // .mode = .bare,
+ //});
+ try w2.print("SP = 0x{x:0>16}\r\n", .{instructions.stackPointer()});
+ try w2.print("trans 0x{?x:0>16}\r\n", .{kmem.translate(instructions.stackPointer())});
+ const fp = asm volatile (""
+ : [fp] "={fp}" (-> usize),
+ );
+ try w2.print("FP = 0x{x:0>16}\r\n", .{fp});
+ const ra = asm volatile (""
+ : [ra] "={ra}" (-> usize),
+ );
+ try w2.print("RA = 0x{x:0>16}\r\n", .{ra});
try w.print("Timer : {d} Hz\r\n", .{1 / (@as(f64, process.schedule_interval_millis) / 1000)});
diff --git a/src/paging.zig b/src/paging.zig
index e066451..7268882 100644
--- a/src/paging.zig
+++ b/src/paging.zig
@@ -14,8 +14,12 @@ pub const rodata_start = @extern(*anyopaque, .{ .name = "_rodata_start" });
pub const rodata_end = @extern(*anyopaque, .{ .name = "_rodata_end" });
pub const data_start = @extern(*anyopaque, .{ .name = "_data_start" });
pub const data_end = @extern(*anyopaque, .{ .name = "_data_end" });
+pub const sdata_start = @extern(*anyopaque, .{ .name = "_sdata_start" });
+pub const sdata_end = @extern(*anyopaque, .{ .name = "_sdata_end" });
pub const bss_start = @extern(*anyopaque, .{ .name = "_bss_start" });
pub const bss_end = @extern(*anyopaque, .{ .name = "_bss_end" });
+pub const sbss_start = @extern(*anyopaque, .{ .name = "_sbss_start" });
+pub const sbss_end = @extern(*anyopaque, .{ .name = "_sbss_end" });
pub const stack_start = @extern(*anyopaque, .{ .name = "_stack_start" });
pub const stack_end = @extern(*anyopaque, .{ .name = "_stack_end" });
pub const stvec_stack_start = @extern(*anyopaque, .{ .name = "_stvec_stack_start" });
@@ -428,7 +432,9 @@ pub const Table = struct {
try root.identityMapRange(@intFromPtr(text_start), @intFromPtr(text_end), EntryFlags.readExec);
try root.identityMapRange(@intFromPtr(rodata_start), @intFromPtr(rodata_end), EntryFlags.readOnly);
try root.identityMapRange(@intFromPtr(data_start), @intFromPtr(data_end), EntryFlags.readWrite);
+ try root.identityMapRange(@intFromPtr(sdata_start), @intFromPtr(sdata_end), EntryFlags.readWrite);
try root.identityMapRange(@intFromPtr(bss_start), @intFromPtr(bss_end), EntryFlags.readWrite);
+ try root.identityMapRange(@intFromPtr(sbss_start), @intFromPtr(sbss_end), EntryFlags.readWrite);
try root.identityMapRange(@intFromPtr(stack_start), @intFromPtr(stack_end), EntryFlags.readWrite);
try root.identityMapRange(@intFromPtr(stvec_stack_start), @intFromPtr(stvec_stack_end), EntryFlags.readWrite);
try root.identityMapRange(@intFromPtr(heap_start), @intFromPtr(heap_end), EntryFlags.readWrite);
diff --git a/src/process.zig b/src/process.zig
index 13281e3..ff6018e 100644
--- a/src/process.zig
+++ b/src/process.zig
@@ -10,7 +10,7 @@ const paging = @import("paging.zig");
const time = @import("sbi/time.zig");
const trap = @import("trap.zig");
-pub const schedule_interval_millis = 1;
+pub const schedule_interval_millis = 10;
pub var list = std.mem.zeroInit(std.DoublyLinkedList(Info), .{});
diff --git a/src/sbi/legacy.zig b/src/sbi/legacy.zig
new file mode 100644
index 0000000..e544367
--- /dev/null
+++ b/src/sbi/legacy.zig
@@ -0,0 +1,41 @@
+// SPDX-FileCopyrightText: 2024 Himbeer <himbeer@disroot.org>
+//
+// SPDX-License-Identifier: AGPL-3.0-or-later
+
+const std = @import("std");
+
+const instructions = @import("../instructions.zig");
+const sbi = @import("../sbi.zig");
+
+const ExtId = enum(usize) {
+ SetTimer = 0x00,
+ ConsolePutchar = 0x01,
+ ConsoleGetchar = 0x02,
+ ClearIpi = 0x03,
+ SendIpi = 0x04,
+ RemoteFenceI = 0x05,
+ RemoteSFenceVma = 0x06,
+ RemoteSFenceVmaAsid = 0x07,
+ Shutdown = 0x08,
+};
+
+pub const Writer = std.io.Writer(void, sbi.Error, write);
+
+fn write(_: void, bytes: []const u8) !usize {
+ for (bytes) |byte| {
+ const ret = instructions.ecall(@intFromEnum(ExtId.ConsolePutchar), 0, byte, 0, 0);
+ if (ret.err != 0) {
+ return sbi.errorFromCode(ret.err);
+ }
+ }
+
+ return bytes.len;
+}
+
+pub fn writer() !Writer {
+ if (!try sbi.probeExt(@intFromEnum(ExtId.ConsolePutchar))) {
+ return sbi.Error.NotSupported;
+ }
+
+ return .{ .context = {} };
+}
diff --git a/src/uart.zig b/src/uart.zig
index 02032da..9374a41 100644
--- a/src/uart.zig
+++ b/src/uart.zig
@@ -49,10 +49,12 @@ pub fn init(kmem: *paging.Table, dt: *const fdt.Tree, allocator: std.mem.Allocat
const regs = try node.reg(allocator);
defer regs.deinit();
- const reg = try kmem.mapDevice(regs.items[0]);
+ //const reg = try kmem.mapDevice(regs.items[0]);
+ _ = try kmem.mapDevice(regs.items[0]);
const reg_shift_bytes = node.props.get("reg-shift");
const reg_shift = if (reg_shift_bytes) |bytes| std.mem.readInt(u32, bytes[0..4], .big) else 0;
- default = .{ .reg = reg.slice(u8), .reg_shift = @intCast(reg_shift) };
+ //default = .{ .reg = reg.slice(u8), .reg_shift = @intCast(reg_shift) };
+ default = .{ .reg = regs.items[0].slice(u8), .reg_shift = @intCast(reg_shift) };
}