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authorHimbeer <himbeer@disroot.org>2024-05-26 13:16:44 +0200
committerHimbeer <himbeer@disroot.org>2024-05-26 13:16:44 +0200
commit91f8ece93977b99d2bbb9fee34cc39de1020cdee (patch)
tree603f2e58cd079f61a04b5a4257e7e611d70e0b36
parentdc2865a05dcd00e4b05cc5ecc57a980fec669c27 (diff)
doc: Add instructions for Lichee Pi 4A
Fixes #20.
-rw-r--r--README.md73
1 files changed, 65 insertions, 8 deletions
diff --git a/README.md b/README.md
index 86d4707..b3d5c67 100644
--- a/README.md
+++ b/README.md
@@ -62,7 +62,8 @@ Required dependencies:
* riscv64-linux-gnu-gcc
Clone the [OpenSBI repository](https://github.com/riscv-software-src/opensbi)
-and run the following command:
+and run the following command. If building for the Lichee Pi 4A, use the
+[T-Head OpenSBI fork](https://github.com/revyos/thead-opensbi) instead.
```
make CROSS_COMPILE=riscv64-linux-gnu- PLATFORM=generic FW_DYNAMIC=y -j $(nproc) all
@@ -86,8 +87,10 @@ There are several T-Head-specific forks that implement it for the Linux kernel,
but none that support regular ELF binaries.
Therefore a custom fork of U-Boot is required.
+### QEMU
+
Clone the [U-Boot fork](https://codeberg.org/Himbeer/u-boot),
-check out the `sbiboot` branch and run:
+check out the `sbiboot` branch and run the following commands:
```
make qemu-riscv64_spl_defconfig
@@ -110,7 +113,27 @@ Set the following options:
* Boot options > Boot images > Flattened Image Tree (FIT) > Enable SPL loading U-Boot as a FIT (basic fitImage features) (CONFIG_SPL_LOAD_FIT): No
* Boot options > bootcmd value (CONFIG_BOOTCOMMAND): "virtio scan; fatload virtio 0 0x8f000000 uImage; bootm 0x8f000000"
-Then exit and select 'yes' to save your changes. Next, build the binaries:
+Then exit and select 'yes' to save your changes.
+
+### Lichee Pi 4A
+
+If building for the Lichee Pi 4A, use the
+[T-Head-specific U-Boot fork](https://codeberg.org/Himbeer/thead-u-boot)
+instead and run the following command:
+
+```
+make light_lpi4a_defconfig
+```
+
+For the 16 GB variant, use a different config:
+
+```
+make light_lpi4a_16g_defconfig
+```
+
+### Build the binaries
+
+Finally, build the binaries:
```
make ARCH=riscv CROSS_COMPILE=riscv64-linux-gnu- -j $(nproc) u-boot-with-spl.bin
@@ -125,11 +148,7 @@ Create a legacy U-Boot image:
```
Write this `uImage` file to the first, FAT32 (LBA) partition
-on an MBR partitioned drive. You should now be able to boot QEMU:
-
-```
-qemu-system-riscv64 -M virt -m 2G -display none -serial stdio -bios /path/to/u-boot-with-spl.bin -drive file=/path/to/disk/image,if=virtio,media=disk,format=raw
-```
+on an MBR partitioned drive. You should now be able to boot.
### Extract QEMU device tree
@@ -160,6 +179,44 @@ fatwrite virtio 0 0x<ENV_OUTPUT> <EMPTY_FILE_NAME> <HEX_TOTALSIZE>
You can now `poweroff`, mount the partition again and build an image
using the commands above.
+## Start QEMU
+
+Run the following command:
+
+```
+qemu-system-riscv64 -M virt -m 2G -smp 4 -display none -serial stdio -bios /path/to/u-boot-with-spl.bin -drive file=/path/to/disk/image,if=virtio,media=disk,format=raw
+```
+
+## Flash to Lichee Pi 4A
+
+Required dependencies:
+
+* android-sdk-platform-tools
+
+Hold down the `BOOT` button on the board, connect it to your computer
+using USB-C and release the button. Create an image file, format it
+as ext4 (using `dd(1)` and `mkfs.ext4(1)`) and mount it.
+Copy the `uImage` file to it, unmount it and flush the changes to disk
+(using `sync(1)`). Then run the following commands as root:
+
+```
+fastboot flash ram /path/to/thead-u-boot/u-boot-with-spl.bin
+fastboot reboot
+# The next command is going to wait for the device for a few seconds, be patient
+fastboot flash uboot /path/to/thead-u-boot/u-boot-with-spl.bin
+fastboot flash boot /path/to/image/file.img
+```
+
+You can now reboot the device and use the serial (UART0) console
+to start the kernel by entering the U-Boot shell
+(by pressing a key to stop autoboot or by waiting for it to fail)
+and typing:
+
+```
+ext4load mmc 0:2 0x8f000000 uImage
+bootm 0x8f000000
+```
+
# Boot protocol
The kernel expects to be loaded in S-mode with the following register values: